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Message-ID: <CAG0y8xkAqscKC0qpx+zkBsmxtZFRaHdSgNLA78eGJUsQEtxQSA@mail.gmail.com>
Date: Thu, 21 May 2020 22:23:14 -0700
From: Paul Burton <paulburton@...nel.org>
To: "Maciej W. Rozycki" <macro@....com>,
Bjorn Helgaas <helgaas@...nel.org>
Cc: Krzysztof Wilczynski <kw@...ux.com>, linux-pci@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"Maciej W. Rozycki" <macro@...ux-mips.org>
Subject: Re: piix4-poweroff.c I/O BAR usage
Hello,
On Thu, May 21, 2020 at 6:04 PM Maciej W. Rozycki <macro@....com> wrote:
> Paul may or may not be reachable anymore, so I'll step in.
I'm reachable but lacking free time & with no access to Malta hardware
I can't claim to be too useful here, so thanks for responding :)
Before being moved to a driver (which was mostly driven by a desire to
migrate Malta to a multi-platform/generic kernel using DT) this code
was part of arch/mips/mti-malta/ where I added it in commit
b6911bba598f ("MIPS: Malta: add suspend state entry code"). My main
motivation at the time was to make QEMU exit after running poweroff,
but I did ensure it worked on real Malta boards too (at least Malta-R
with CoreFPGA6). Over the years since then it shocked a couple of
hardware people to see software power off a Malta - if the original
hardware designers had intended that to work then the knowledge had
been lost over time :)
I suspect the code was based on visws_machine_power_off():
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/x86/platform/visws/visws_quirks.c?h=v3.10#n125
> > pci_request_region() takes a BAR number (0-5), but here we're passing
> > PCI_BRIDGE_RESOURCES (13 if CONFIG_PCI_IOV, or 7 otherwise), which is
> > the bridge I/O window.
> >
> > I don't think this device ([8086:7113]) is a bridge, so that resource
> > should be empty.
>
> Hmm, isn't the resource actually set up by `quirk_piix4_acpi' though?
I agree that the region used is meant to match that set up by
quirk_piix4_acpi(), which also refers to it using the
PCI_BRIDGE_RESOURCES macro.
Thanks,
Paul
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