linux-kernel - Re: [PATCH v2 1/6] arm64: Detect the ARMv8.4 TTL feature

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Date:   Fri, 22 May 2020 16:50:02 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     Zhenyu Ye <yezhenyu2@...wei.com>
Cc:     peterz@...radead.org, mark.rutland@....com, will@...nel.org,
        aneesh.kumar@...ux.ibm.com, akpm@...ux-foundation.org,
        npiggin@...il.com, arnd@...db.de, rostedt@...dmis.org,
        maz@...nel.org, suzuki.poulose@....com, tglx@...utronix.de,
        yuzhao@...gle.com, Dave.Martin@....com, steven.price@....com,
        broonie@...nel.org, guohanjun@...wei.com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-arch@...r.kernel.org, linux-mm@...ck.org, arm@...nel.org,
        xiexiangyou@...wei.com, prime.zeng@...ilicon.com,
        zhangshaokun@...ilicon.com, kuhn.chenqun@...wei.com
Subject: Re: [PATCH v2 1/6] arm64: Detect the ARMv8.4 TTL feature

On Thu, Apr 23, 2020 at 09:56:51PM +0800, Zhenyu Ye wrote:
> From: Marc Zyngier <maz@...nel.org>
> 
> In order to reduce the cost of TLB invalidation, the ARMv8.4 TTL
> feature allows TLBs to be issued with a level allowing for quicker
> invalidation.
> 
> The TTL field indicates the level of page table walk
> holding the leaf entry for the address being invalidated.
> 
> Let's detect the feature for now. Further patches will implement
> its actual usage.
> 
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> Signed-off-by: Zhenyu Ye <yezhenyu2@...wei.com>

Reviewed-by: Catalin Marinas <catalin.marinas@....com>