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Date: Wed, 27 May 2020 18:48:54 +0300 From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com> To: Serge Semin <Sergey.Semin@...kalelectronics.ru> Cc: Serge Semin <fancer.lancer@...il.com>, Jarkko Nikula <jarkko.nikula@...ux.intel.com>, Wolfram Sang <wsa@...-dreams.de>, Mika Westerberg <mika.westerberg@...ux.intel.com>, Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>, Thomas Bogendoerfer <tsbogend@...ha.franken.de>, Rob Herring <robh+dt@...nel.org>, linux-mips@...r.kernel.org, devicetree@...r.kernel.org, linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v4 07/11] i2c: designware: Discard Cherry Trail model flag On Wed, May 27, 2020 at 05:29:02PM +0300, Serge Semin wrote: > On Wed, May 27, 2020 at 04:43:39PM +0300, Andy Shevchenko wrote: > > On Wed, May 27, 2020 at 03:01:07PM +0300, Serge Semin wrote: > > > A PM workaround activated by the flag MODEL_CHERRYTRAIL has been removed > > > since commit 9cbeeca05049 ("i2c: designware: Remove Cherry Trail PMIC I2C > > > bus pm_disabled workaround"), but the flag most likely by mistake has been > > > left in the Dw I2C drivers. Let's remove it. > > > > ... > > > > > -#define MODEL_MSCC_OCELOT 0x00000200 > > > +#define MODEL_MSCC_OCELOT 0x00000100 > > > > But why? > > > > Does 0x200 work or not? I didn't see this in commit message. > > I removed the MODEL_CHERRYTRAIL flag and redefined the only left > MODEL_MSCC_OCELOT flag to set the very first bit allocated for the model > flags. Isn't that obvious? Yes, but how it's related to the MSCC_OCELOT? Can't you simple put your define later to that number if absence of 0x100 provokes an exception when reading this code. Again, unneeded churn. -- With Best Regards, Andy Shevchenko
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