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Date: Wed, 27 May 2020 18:59:24 -0700 From: Stephen Boyd <sboyd@...nel.org> To: Sivaprakash Murugesan <sivaprak@...eaurora.org>, agross@...nel.org, bjorn.andersson@...aro.org, devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org, mturquette@...libre.com, robh+dt@...nel.org Cc: Sivaprakash Murugesan <sivaprak@...eaurora.org> Subject: Re: [PATCH V6 4/5] clk: qcom: Add ipq6018 apss clock controller Quoting Sivaprakash Murugesan (2020-05-27 05:24:51) > diff --git a/drivers/clk/qcom/apss-ipq6018.c b/drivers/clk/qcom/apss-ipq6018.c > new file mode 100644 > index 0000000..004f7e1 > --- /dev/null > +++ b/drivers/clk/qcom/apss-ipq6018.c > @@ -0,0 +1,106 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2018, The Linux Foundation. All rights reserved. > + */ > + > +#include <linux/kernel.h> > +#include <linux/err.h> > +#include <linux/platform_device.h> > +#include <linux/clk-provider.h> > +#include <linux/regmap.h> > +#include <linux/module.h> > + > +#include <dt-bindings/clock/qcom,apss-ipq.h> > + > +#include "common.h" > +#include "clk-regmap.h" > +#include "clk-branch.h" > +#include "clk-alpha-pll.h" > +#include "clk-regmap-mux.h" > + > +enum { > + P_XO, > + P_APSS_PLL_EARLY, > +}; > + > +static const struct clk_parent_data parents_apcs_alias0_clk_src[] = { > + { .fw_name = "xo" }, > + { .fw_name = "pll" }, This pll clk is not described in the binding. Please add it there. > +}; > + > +static const struct parent_map parents_apcs_alias0_clk_src_map[] = { > + { P_XO, 0 }, > + { P_APSS_PLL_EARLY, 5 }, > +}; > +
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