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Message-ID: <20200602182425.GA862776@x1>
Date: Tue, 2 Jun 2020 20:24:25 +0200
From: Drew Fustini <drew@...gleboard.org>
To: Grygorii Strashko <grygorii.strashko@...com>
Cc: Tony Lindgren <tony@...mide.com>, linux-omap@...r.kernel.org,
linux-kernel@...r.kernel.org,
BenoƮt Cousson <bcousson@...libre.com>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
Santosh Shilimkar <ssantosh@...nel.org>,
Suman Anna <s-anna@...com>,
Haojian Zhuang <haojian.zhuang@...aro.org>,
Linus Walleij <linus.walleij@...aro.org>,
linux-gpio@...r.kernel.org, jkridner@...gleboard.org,
robertcnelson@...il.com
Subject: Re: [PATCH] ARM: dts: AM33xx-l4: add gpio-ranges
On Tue, Jun 02, 2020 at 04:44:03PM +0300, Grygorii Strashko wrote:
>
>
> On 02/06/2020 16:14, Drew Fustini wrote:
> > Add gpio-ranges properties to the gpio controller nodes.
> >
> > These gpio-ranges were created based on "Table 9-10. CONTROL_MODULE
> > REGISTERS" in the "AM335x Technical Reference Manual" [0] and "Table
> > 4-2. Pin Attributes" in the "AM335x Sitara Processor datasheet" [1].
> > A csv file with this data is available for reference [2].
>
> It will be good if you can explain not only "what" is changed, but
> also "why" it's needed in commit message.
That is a good point.
One reason for this patch is I think it makes sense to add gpio-ranges
properties as they describe the relationship between a gpio line and
pin control register that exists in the hardware. For example, GPMC_A0
pin has mode 7 which is labeled gpio1_16. The conf_gpmc_a0 register is
at offset 840h which makes it pin 16.
The other reason is that I would like to patch omap_gpio_set_config()
to call gpiochip_generic_config() for PIN_CONFIG_PULL_{UP,DOWN}. It
currently fails at pinctrl_get_device_gpio_range():
omap_gpio_set_config()
|- gpiochip_generic_config()
|- pinctrl_gpio_set_config()
|- gpio_to_pin()
|- pinctrl_get_device_gpio_range() [no gpio-ranges so fails]
Thank you,
Drew
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