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Message-ID: <6926b2da-5d00-b582-7d25-a8a0d7014570@socionext.com>
Date:   Thu, 4 Jun 2020 18:43:11 +0900
From:   Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
To:     Marc Zyngier <maz@...nel.org>
Cc:     Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Jingoo Han <jingoohan1@...il.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Rob Herring <robh+dt@...nel.org>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Masami Hiramatsu <masami.hiramatsu@...aro.org>,
        Jassi Brar <jaswinder.singh@...aro.org>
Subject: Re: [PATCH v3 1/6] PCI: dwc: Add msi_host_isr() callback

Hi Marc,

On 2020/06/03 20:15, Marc Zyngier wrote:
> On 2020-06-03 09:54, Kunihiko Hayashi wrote:
>> This adds msi_host_isr() callback function support to describe
>> SoC-dependent service triggered by MSI.
>>
>> For example, when AER interrupt is triggered by MSI, the callback function
>> reads SoC-dependent registers and detects that the interrupt is from AER,
>> and invoke AER interrupts related to MSI.
>>
>> Cc: Marc Zyngier <maz@...nel.org>
>> Cc: Jingoo Han <jingoohan1@...il.com>
>> Cc: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
>> ---
>>  drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++----
>>  drivers/pci/controller/dwc/pcie-designware.h      | 1 +
>>  2 files changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
>> b/drivers/pci/controller/dwc/pcie-designware-host.c
>> index 0a4a5aa..9b628a2 100644
>> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
>> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
>> @@ -112,13 +112,13 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp)
>>  static void dw_chained_msi_isr(struct irq_desc *desc)
>>  {
>>      struct irq_chip *chip = irq_desc_get_chip(desc);
>> -    struct pcie_port *pp;
>> +    struct pcie_port *pp = irq_desc_get_handler_data(desc);
>>
>> -    chained_irq_enter(chip, desc);
>> +    if (pp->ops->msi_host_isr)
>> +        pp->ops->msi_host_isr(pp);
> 
> Why is this call outside of the enter/exit guards?
> Do you still need to execute the standard handler?

I assume that the msi_host_isr() contains chained interrupts in
the second patch and no need to treat as the standard handler,
so this should be called in the guards.
I'll move this call to the top of dw_chained_msi_isr().

Thank you,

---
Best Regards
Kunihiko Hayashi

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