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Message-ID: <CAHp75VfMSbAMPg2ZLO6kE-9vkQCt0a+=Lji8V5ngY7xdUbfiMQ@mail.gmail.com>
Date: Fri, 5 Jun 2020 11:07:32 +0300
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Michael Walle <michael@...le.cc>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-hwmon@...r.kernel.org, linux-pwm@...r.kernel.org,
linux-watchdog@...r.kernel.org,
linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Jean Delvare <jdelvare@...e.com>,
Guenter Roeck <linux@...ck-us.net>,
Lee Jones <lee.jones@...aro.org>,
Thierry Reding <thierry.reding@...il.com>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>,
Wim Van Sebroeck <wim@...ux-watchdog.org>,
Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
Thomas Gleixner <tglx@...utronix.de>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <maz@...nel.org>, Mark Brown <broonie@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Subject: Re: [PATCH v4 03/11] irqchip: add sl28cpld interrupt controller support
On Fri, Jun 5, 2020 at 12:13 AM Michael Walle <michael@...le.cc> wrote:
>
> Add support for the interrupt controller inside the sl28 CPLD management
> controller.
>
> The interrupt controller can handle at most 8 interrupts and is really
> simplistic and consists only of an interrupt mask and an interrupt
> pending register.
...
> +config SL28CPLD_INTC
> + bool
Same Q: Why not module?
...
> +static const struct of_device_id sl28cpld_intc_of_match[] = {
> + { .compatible = "kontron,sl28cpld-intc" },
> + {},
There is no point to have comma in terminator line.
> +};
--
With Best Regards,
Andy Shevchenko
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