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Message-Id: <1591709203-12106-2-git-send-email-dillon.minfei@gmail.com>
Date: Tue, 9 Jun 2020 21:26:40 +0800
From: dillon.minfei@...il.com
To: robh+dt@...nel.org, mcoquelin.stm32@...il.com,
alexandre.torgue@...com, p.zabel@...gutronix.de,
pierre-yves.mordret@...com, philippe.schenker@...adex.com
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com,
linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
dillon min <dillon.minfei@...il.com>
Subject: [PATCH v4 1/4] ARM: dts: stm32: add I2C3 support on STM32F429 SoC
From: dillon min <dillon.minfei@...il.com>
This patch adds I2C3 instances of the STM32F429 SoC
Signed-off-by: dillon min <dillon.minfei@...il.com>
---
arch/arm/boot/dts/stm32f429.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index d7770699feb5..257b8431dece 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -402,6 +402,18 @@
status = "disabled";
};
+ i2c3: i2c@...05c00 {
+ compatible = "st,stm32f4-i2c";
+ reg = <0x40005c00 0x400>;
+ interrupts = <72>,
+ <73>;
+ resets = <&rcc STM32F4_APB1_RESET(I2C3)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C3)>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
dac: dac@...07400 {
compatible = "st,stm32f4-dac-core";
reg = <0x40007400 0x400>;
--
2.7.4
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