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Message-ID: <70271f66ad792f7ab16a907ddf73e0f3@codeaurora.org>
Date:   Tue, 09 Jun 2020 19:24:34 +0530
From:   Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        Andy Gross <agross@...nel.org>
Cc:     Stephen Boyd <swboyd@...omium.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, coresight@...ts.linaro.org,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach <mike.leach@...aro.org>, devicetree@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>
Subject: Re: [PATCH 2/2] arm64: dts: qcom: sc7180: Add support to skip
 powering up of ETM

Hi Bjorn,

On 2020-05-15 16:21, Sai Prakash Ranjan wrote:
> Add "qcom,skip-power-up" property to skip powering up ETM
> on SC7180 SoC to workaround a hardware errata where CPU
> watchdog counter is stopped when ETM power up bit is set
> (i.e., when TRCPDCR.PU = 1).
> 
> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>
> ---
> 
> Depends on ETM driver change here -
> https://lore.kernel.org/patchwork/cover/1242100/
> 
> ---
>  arch/arm64/boot/dts/qcom/sc7180.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index 8b3707347547..de4bae4ec224 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -1657,6 +1657,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1676,6 +1677,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1695,6 +1697,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1714,6 +1717,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1733,6 +1737,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1752,6 +1757,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1771,6 +1777,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {
> @@ -1790,6 +1797,7 @@
>  			clocks = <&aoss_qmp>;
>  			clock-names = "apb_pclk";
>  			arm,coresight-loses-context-with-cpu;
> +			qcom,skip-power-up;
> 
>  			out-ports {
>  				port {

I have sent this patch as a part of other coresight changes
to keep all coresight DT changes together[1], we can drop this
patch now.

[1] - https://lore.kernel.org/patchwork/cover/1253969/

Thanks,
Sai

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