lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 16 Jun 2020 17:26:01 +0800
From:   Frank Lee <tiny.windzz@...il.com>
To:     Maxime Ripard <maxime@...no.tech>
Cc:     wens <wens@...e.org>,
        李扬韬 <frank@...winnertech.com>,
        "linus.walleij" <linus.walleij@...aro.org>,
        "robh+dt" <robh+dt@...nel.org>,
        mturquette <mturquette@...libre.com>, sboyd <sboyd@...nel.org>,
        "p.zabel" <p.zabel@...gutronix.de>,
        黄烁生 <huangshuosheng@...winnertech.com>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        linux-gpio <linux-gpio@...r.kernel.org>
Subject: Re: 回复:[PATCH 2/4] pinctrl: sunxi: add support for the Allwinner A100 pin controller

HI Chen-Yu,  Linus,

On Fri, Jun 5, 2020 at 11:13 PM Maxime Ripard <maxime@...no.tech> wrote:
>
> Hi Frank,
>
> On Wed, Jun 03, 2020 at 05:44:36PM +0800, 李扬韬 wrote:
> > >> + SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
> > >> +  SUNXI_FUNCTION(0x0, "gpio_in"),
> > >> +  SUNXI_FUNCTION(0x1, "gpio_out"),
> > >> +  SUNXI_FUNCTION(0x2, "mmc0"),  /* D1 */
> > >> +  SUNXI_FUNCTION(0x3, "jtag"),  /* MS1 */
> > >> +  SUNXI_FUNCTION(0x4, "jtag"),  /* MS_GPU */
> > >
> > >We should use another name here, since the code will just pick the first one and
> > >ignore the second. What about jtag-gpu?
> >
> > The underscores are used in front, so changing it to jtag_gpu may be more consistent.
>
> Yep, that makes sense
>
> > >> + SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
> > >> +  SUNXI_FUNCTION(0x0, "gpio_in"),
> > >> +  SUNXI_FUNCTION(0x1, "gpio_out"),
> > >> +  SUNXI_FUNCTION(0x2, "spdif"),  /* DIN */
> > >> +  SUNXI_FUNCTION(0x3, "i2s0"),  /* DOUT0 */
> > >> +  SUNXI_FUNCTION(0x4, "i2s0"),  /* DIN1 */
> > >
> > >I guess the second one would be i2s1?
> >
> > No, each i2s may have many inputs and outputs.
> >
> >  SUNXI_PIN(SUNXI_PINCTRL_PIN(H, 19),
> >      SUNXI_FUNCTION(0x0, "gpio_in"),
> >               SUNXI_FUNCTION(0x1, "gpio_out"),
> >               SUNXI_FUNCTION(0x2, "cir0"),          /* IN */
> >               SUNXI_FUNCTION(0x3, "i2s3_dout3"),       /* DOUT3 */
> >               SUNXI_FUNCTION(0x4, "i2s3_din3"),       /* DIN3 */
> >               SUNXI_FUNCTION(0x5, "ledc"),
> >               SUNXI_FUNCTION_IRQ_BANK(0x6, 6, 19)),
> >
> > Considering that the same pin has multiple same functions,
> > so add a suffix, like i2s3_dout3 and i2s3_din3?
> >
> > Or specify muxsel in the device tree may be another solution.
>
> Having muxsel is not really an option. We have two sets of bindings to
> maintain already, adding a third one would make it fairly hard to
> maintain. And the second binding we support is the generic pinctrl
> binding, so I'm not really sure why we would want to move away from
> that.
>
> And I'm not really fond of having a suffix either. It kind of breaks the
> consistency we had so far, and ideally I'd like to keep that.
>
> Chen-Yu, Linus? Any input on that one?

PING......

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ