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Message-Id: <20200617074930.v3.4.I70c17309f8b433e900656d7c53a2e6b61888bb68@changeid>
Date: Wed, 17 Jun 2020 07:51:16 -0700
From: Douglas Anderson <dianders@...omium.org>
To: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>
Cc: dhavalp@...eaurora.org, mturney@...eaurora.org,
rnayak@...eaurora.org, Ravi Kumar Bokka <rbokka@...eaurora.org>,
linux-arm-msm@...r.kernel.org, saiprakash.ranjan@...eaurora.org,
sparate@...eaurora.org, mkurumel@...eaurora.org,
Douglas Anderson <dianders@...omium.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v3 4/4] arm64: dts: qcom: sc7180: Add properties to qfprom for fuse blowing
From: Ravi Kumar Bokka <rbokka@...eaurora.org>
This patch adds properties to the qfprom node to enable fuse blowing.
Signed-off-by: Ravi Kumar Bokka <rbokka@...eaurora.org>
Signed-off-by: Douglas Anderson <dianders@...omium.org>
---
Changes in v3:
- Name is now 'efuse' to match what schema checker wants.
- Reorganized ranges to match driver/bindings changes.
- Added 4th range as per driver/binding changes.
- No more reg-names as per driver/binding changes.
- Clock name is now just "sec" as per driver/binding changes.
arch/arm64/boot/dts/qcom/sc7180-idp.dts | 4 ++++
arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7180-idp.dts b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
index 4e9149d82d09..2a9224e2083f 100644
--- a/arch/arm64/boot/dts/qcom/sc7180-idp.dts
+++ b/arch/arm64/boot/dts/qcom/sc7180-idp.dts
@@ -287,6 +287,10 @@ vreg_bob: bob {
};
};
+&qfprom {
+ vcc-supply = <&vreg_l11a_1p8>;
+};
+
&qspi {
status = "okay";
pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 31b9217bb5bf..d7f5e3d64b17 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -498,9 +498,15 @@ gcc: clock-controller@...000 {
#power-domain-cells = <1>;
};
- qfprom@...000 {
+ qfprom: efuse@...000 {
compatible = "qcom,qfprom";
- reg = <0 0x00784000 0 0x8ff>;
+ reg = <0 0x00784000 0 0x8ff>,
+ <0 0x00780000 0 0x7a0>,
+ <0 0x00782000 0 0x100>,
+ <0 0x00786000 0 0x1fff>;
+
+ clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
+ clock-names = "sec";
#address-cells = <1>;
#size-cells = <1>;
--
2.27.0.290.gba653c62da-goog
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