linux-kernel - linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

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Message-ID: <20200630115202.04c39f9b@canb.auug.org.au>
Date:   Tue, 30 Jun 2020 11:52:02 +1000
From:   Stephen Rothwell <sfr@...b.auug.org.au>
To:     Daniel Vetter <daniel.vetter@...ll.ch>,
        Jani Nikula <jani.nikula@...ux.intel.com>,
        Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>,
        Rodrigo Vivi <rodrigo.vivi@...el.com>,
        Intel Graphics <intel-gfx@...ts.freedesktop.org>,
        DRI <dri-devel@...ts.freedesktop.org>
Cc:     Linux Next Mailing List <linux-next@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Chris Wilson <chris@...is-wilson.co.uk>,
        Colin Xu <colin.xu@...el.com>,
        Zhenyu Wang <zhenyuw@...ux.intel.com>,
        Dave Airlie <airlied@...ux.ie>
Subject: linux-next: manual merge of the drm-intel tree with the
 drm-intel-fixes tree

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/gvt/handlers.c

between commit:

  fc1e3aa0337c ("drm/i915/gvt: Fix incorrect check of enabled bits in mask registers")

from the drm-intel-fixes tree and commit:

  5f4ae2704d59 ("drm/i915: Identify Cometlake platform")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/i915/gvt/handlers.c
index fadd2adb8030,26cae4846c82..000000000000
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@@ -1731,8 -1734,9 +1734,9 @@@ static int ring_mode_mmio_write(struct 
  		return 0;
  	}
  
- 	if (IS_COFFEELAKE(vgpu->gvt->gt->i915) &&
+ 	if ((IS_COFFEELAKE(vgpu->gvt->gt->i915) ||
+ 	     IS_COMETLAKE(vgpu->gvt->gt->i915)) &&
 -	    data & _MASKED_BIT_ENABLE(2)) {
 +	    IS_MASKED_BITS_ENABLED(data, 2)) {
  		enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST);
  		return 0;
  	}

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