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Message-ID: <20200630163954.GY4817@hirez.programming.kicks-ass.net>
Date:   Tue, 30 Jun 2020 18:39:54 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     "Liang, Kan" <kan.liang@...ux.intel.com>
Cc:     mingo@...hat.com, acme@...nel.org, tglx@...utronix.de,
        bp@...en8.de, x86@...nel.org, linux-kernel@...r.kernel.org,
        mark.rutland@....com, alexander.shishkin@...ux.intel.com,
        jolsa@...hat.com, namhyung@...nel.org, dave.hansen@...el.com,
        yu-cheng.yu@...el.com, bigeasy@...utronix.de, gorcunov@...il.com,
        hpa@...or.com, alexey.budankov@...ux.intel.com, eranian@...gle.com,
        ak@...ux.intel.com, like.xu@...ux.intel.com,
        yao.jin@...ux.intel.com, wei.w.wang@...el.com
Subject: Re: [PATCH V2 08/23] perf/x86: Expose CPUID enumeration bits for
 arch LBR

On Tue, Jun 30, 2020 at 11:36:29AM -0400, Liang, Kan wrote:
> > Why keep the full CPUID leaf here? What's wrong with something like:
> > 
> > 	unsigned int	lbr_depth_mask:8;
> > 	unsigned int	lbr_deep_c_reset:1;
> > 	unsigned int	lbr_lip:1;
> > 	unsigned int	lbr_cpl:1;
> > 	unsigned int	lbr_filter:1;
> > 	unsigned int	lbr_call_stack:1;
> > 	unsigned int	lbr_mispred:1;
> > 	unsigned int	lbr_timed_lbr:1;
> > 	unsigned int	lbr_br_type:1;
> > 
> > That's only 2 bytes, instead of 24.
> 
> Yes, it can save the space.
> I will add some codes in patch 14 to initialize these items in
> intel_pmu_arch_lbr_init().

It also makes stuff like:

> +   if (!x86_pmu.lbr_ebx.split.lbr_cpl ||
> +       !x86_pmu.lbr_ebx.split.lbr_filter ||
> +       !x86_pmu.lbr_ebx.split.lbr_call_stack)

eminently more readable.

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