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Message-ID: <20200630164225.GZ4817@hirez.programming.kicks-ass.net>
Date:   Tue, 30 Jun 2020 18:42:25 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     "Liang, Kan" <kan.liang@...ux.intel.com>
Cc:     mingo@...hat.com, acme@...nel.org, tglx@...utronix.de,
        bp@...en8.de, x86@...nel.org, linux-kernel@...r.kernel.org,
        mark.rutland@....com, alexander.shishkin@...ux.intel.com,
        jolsa@...hat.com, namhyung@...nel.org, dave.hansen@...el.com,
        yu-cheng.yu@...el.com, bigeasy@...utronix.de, gorcunov@...il.com,
        hpa@...or.com, alexey.budankov@...ux.intel.com, eranian@...gle.com,
        ak@...ux.intel.com, like.xu@...ux.intel.com,
        yao.jin@...ux.intel.com, wei.w.wang@...el.com
Subject: Re: [PATCH V2 14/23] perf/x86/intel/lbr: Support Architectural LBR

On Tue, Jun 30, 2020 at 12:17:57PM -0400, Liang, Kan wrote:

> > > +static inline bool is_lbr_call_stack_bit_set(u64 config)
> > > +{
> > > +	if (x86_pmu.arch_lbr)
> > > +		return !!(config & ARCH_LBR_CALL_STACK);
> > > +
> > > +	return !!(config & LBR_CALL_STACK);
> > > +}

> > > +	x86_pmu.arch_lbr = true;

> > How about we make this here clear FEATURE_ARCH_LBR if it fails and then
> > do away with x86_pmu.arch_lbr and use
> > static_cpu_has(X86_FEATURE_ARCH_LBR) a lot more?
> 
> Yes, it's doable. So we can save a bit for arch_lbr in structure x86_pmu.

Mostly it's about getting rid of a load-test-branch.

> I will clear the FEATURE_ARCH_LBR via clear_cpu_cap(&boot_cpu_data,
> X86_FEATURE_ARCH_LBR);, if the check fails.
> I will replace x86_pmu.arch_lbr with static_cpu_has(X86_FEATURE_ARCH_LBR)
> everywhere.

Thanks!

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