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Message-ID: <eaf63c21-5e90-84ad-6c93-ea3dd1c4196e@kernel.org>
Date:   Mon, 6 Jul 2020 13:58:38 -0500
From:   Dinh Nguyen <dinguyen@...nel.org>
To:     Krzysztof Kozlowski <krzk@...nel.org>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: spcfpga: Align GIC, NAND and UART nodenames
 with dtschema



On 6/29/20 3:16 AM, Krzysztof Kozlowski wrote:
> Fix dtschema validator warnings like:
>     intc@...c1000: $nodename:0:
>         'intc@...c1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
> 
> Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org>
> ---
>  arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> index d1fc9c2055f4..9498d1de730c 100644
> --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
> @@ -77,7 +77,7 @@
>  		method = "smc";
>  	};
>  
> -	intc: intc@...c1000 {
> +	intc: interrupt-controller@...c1000 {
>  		compatible = "arm,gic-400", "arm,cortex-a15-gic";
>  		#interrupt-cells = <3>;
>  		interrupt-controller;
> @@ -302,7 +302,7 @@
>  			status = "disabled";
>  		};
>  
> -		nand: nand@...90000 {
> +		nand: nand-controller@...90000 {
>  			#address-cells = <1>;
>  			#size-cells = <0>;
>  			compatible = "altr,socfpga-denali-nand";
> @@ -445,7 +445,7 @@
>  			clock-names = "timer";
>  		};
>  
> -		uart0: serial0@...02000 {
> +		uart0: serial@...02000 {
>  			compatible = "snps,dw-apb-uart";
>  			reg = <0xffc02000 0x100>;
>  			interrupts = <0 108 4>;
> @@ -456,7 +456,7 @@
>  			status = "disabled";
>  		};
>  
> -		uart1: serial1@...02100 {
> +		uart1: serial@...02100 {
>  			compatible = "snps,dw-apb-uart";
>  			reg = <0xffc02100 0x100>;
>  			interrupts = <0 109 4>;
> 

Added the correct Fixes annotation and applied, thanks!
Dinh

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