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Date: Mon, 6 Jul 2020 13:58:27 -0500 From: Dinh Nguyen <dinguyen@...nel.org> To: Krzysztof Kozlowski <krzk@...nel.org>, linux-kernel@...r.kernel.org Cc: Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org Subject: Re: [PATCH] ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema On 6/26/20 3:06 AM, Krzysztof Kozlowski wrote: > Fix dtschema validator warnings like: > l2-cache@...ff000: $nodename:0: > 'l2-cache@...ff000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' > > Signed-off-by: Krzysztof Kozlowski <krzk@...nel.org> > --- > arch/arm/boot/dts/socfpga.dtsi | 2 +- > arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi > index c2b54af417a2..78f3267d9cbf 100644 > --- a/arch/arm/boot/dts/socfpga.dtsi > +++ b/arch/arm/boot/dts/socfpga.dtsi > @@ -726,7 +726,7 @@ > }; > }; > > - L2: l2-cache@...ef000 { > + L2: cache-controller@...ef000 { > compatible = "arm,pl310-cache"; > reg = <0xfffef000 0x1000>; > interrupts = <0 38 0x04>; > diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi > index 3b8571b8b412..8f614c4b0e3e 100644 > --- a/arch/arm/boot/dts/socfpga_arria10.dtsi > +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi > @@ -636,7 +636,7 @@ > reg = <0xffcfb100 0x80>; > }; > > - L2: l2-cache@...ff000 { > + L2: cache-controller@...ff000 { > compatible = "arm,pl310-cache"; > reg = <0xfffff000 0x1000>; > interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; > Added the correct Fixes annotation and applied, thanks! Dinh
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