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Message-Id: <4acad452-33c7-4fb2-ba90-19a824558b94@www.fastmail.com>
Date: Fri, 10 Jul 2020 10:43:59 +0930
From: "Andrew Jeffery" <andrew@...id.au>
To: "Eddie James" <eajames@...ux.ibm.com>, linux-clk@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, linux-aspeed@...ts.ozlabs.org,
linux-mmc <linux-mmc@...r.kernel.org>,
"Joel Stanley" <joel@....id.au>,
"Ulf Hansson" <ulf.hansson@...aro.org>,
"Adrian Hunter" <adrian.hunter@...el.com>,
"Stephen Boyd" <sboyd@...nel.org>,
"Michael Turquette" <mturquette@...libre.com>
Subject: Re: [PATCH 2/2] mmc: sdhci-of-aspeed: Fix clock divider calculation
On Fri, 10 Jul 2020, at 05:27, Eddie James wrote:
> When calculating the clock divider, start dividing at 2 instead of 1.
> The divider is divided by two at the end of the calculation, so starting
> at 1 may result in a divider of 0, which shouldn't happen.
>
> Signed-off-by: Eddie James <eajames@...ux.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@...id.au>
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