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Message-ID: <33513a5d-fbf2-7321-e46b-2f2ba8b337de@microchip.com>
Date: Mon, 13 Jul 2020 09:33:30 +0000
From: <Tudor.Ambarus@...rochip.com>
To: <p.yadav@...com>, <miquel.raynal@...tlin.com>, <richard@....at>,
<vigneshr@...com>, <broonie@...nel.org>,
<Nicolas.Ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<Ludovic.Desroches@...rochip.com>, <matthias.bgg@...il.com>,
<michal.simek@...inx.com>, <linux-mtd@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-spi@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>
CC: <nsekhar@...com>, <boris.brezillon@...labora.com>
Subject: Re: [PATCH v10 11/17] mtd: spi-nor: sfdp: do not make invalid quad
enable fatal
On 6/23/20 9:30 PM, Pratyush Yadav wrote:
> The Micron MT35XU512ABA flash does not support the quad enable bit. But
> instead of programming the Quad Enable Require field to 000b ("Device
> does not have a QE bit"), it is programmed to 111b ("Reserved").
>
> While this is technically incorrect, it is not reason enough to abort
> BFPT parsing. Instead, continue BFPT parsing and let flashes set it in
> their fixup hooks.
>
> Signed-off-by: Pratyush Yadav <p.yadav@...com>
> ---
> drivers/mtd/spi-nor/sfdp.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Applied, thanks!
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