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Date: Tue, 14 Jul 2020 15:09:44 -0600 From: Rob Herring <robh@...nel.org> To: Horia Geantă <horia.geanta@....com> Cc: Franck Lenormand <franck.lenormand@....com>, Marco Felsch <m.felsch@...gutronix.de>, Matt Mackall <mpm@...enic.com>, Iuliana Prodan <iuliana.prodan@....com>, linux-crypto@...r.kernel.org, Fabio Estevam <festevam@...il.com>, Pengutronix Kernel Team <kernel@...gutronix.de>, Martin Kaiser <martin@...ser.cx>, linux-arm-kernel@...ts.infradead.org, NXP Linux Team <linux-imx@....com>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Arnd Bergmann <arnd@...db.de>, linux-kernel@...r.kernel.org, Herbert Xu <herbert@...dor.apana.org.au>, Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org, Shawn Guo <shawnguo@...nel.org>, Silvano Di Ninno <silvano.dininno@....com>, Sascha Hauer <s.hauer@...gutronix.de> Subject: Re: [PATCH v3 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs On Tue, 14 Jul 2020 15:39:16 +0300, Horia Geantă wrote: > RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ. > Add corresponding compatible strings. > > Note: > > Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020) > also have a RNGB, however it's part of the CAAM > (Cryptograhic Accelerator and Assurance Module) crypto accelerator. > In this case, RNGB is managed in the caam driver > (drivers/crypto/caam/), since it's tightly related to > the caam "job ring" interface, not to mention CAAM internally relying on > RNGB as source of randomness. > > On the other hand, the i.MX6 SoCs with RNGB have a DCP > (Data Co-Processor) crypto accelerator and this block and RNGB > are independent. > > Signed-off-by: Horia Geantă <horia.geanta@....com> > --- > Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++ > 1 file changed, 3 insertions(+) > Reviewed-by: Rob Herring <robh@...nel.org>
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