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Message-ID: <CAPv3WKc5hNhDCjgrX8uuJJm9MRS520QcD1NYTY1LWFHEBqJMfg@mail.gmail.com>
Date:   Thu, 16 Jul 2020 14:49:21 +0200
From:   Marcin Wojtas <mw@...ihalf.com>
To:     Grégory Clement <gregory.clement@...tlin.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Robin Murphy <robin.murphy@....com>, joro@...tes.org,
        Tomasz Nowicki <tn@...ihalf.com>,
        Hanna Hawa <hannah@...vell.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>, kernel-team@...roid.com,
        nadavh@...vell.com, iommu@...ts.linux-foundation.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v4 0/4] Add system mmu support for Armada-806

czw., 16 lip 2020 o 14:02 Will Deacon <will@...nel.org> napisał(a):
>
> On Thu, Jul 16, 2020 at 01:00:43PM +0100, Will Deacon wrote:
> > On Wed, 15 Jul 2020 09:06:45 +0200, Tomasz Nowicki wrote:
> > > The series is meant to support SMMU for AP806 and a workaround
> > > for accessing ARM SMMU 64bit registers is the gist of it.
> > >
> > > For the record, AP-806 can't access SMMU registers with 64bit width.
> > > This patches split the readq/writeq into two 32bit accesses instead
> > > and update DT bindings.
> > >
> > > [...]
> >
> > Applied to will (for-joerg/arm-smmu/updates), thanks!
> >
> > [1/3] iommu/arm-smmu: Call configuration impl hook before consuming features
> >       https://git.kernel.org/will/c/6a79a5a3842b
> > [2/3] iommu/arm-smmu: Workaround for Marvell Armada-AP806 SoC erratum #582743
> >       https://git.kernel.org/will/c/f2d9848aeb9f
> > [3/3] dt-bindings: arm-smmu: add compatible string for Marvell Armada-AP806 SMMU-500
> >       https://git.kernel.org/will/c/e85e84d19b9d
>
> (note that I left patch 4 for arm-soc, as that's just updating .dts files)
>

Hi Gregory,

Can you please help with the review/merge of patch #4?

Best regards,
Marcin

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