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Date:   Mon, 27 Jul 2020 16:48:40 +0100
From:   Lee Jones <lee.jones@...aro.org>
To:     Hsin-Hsiung Wang <hsin-hsiung.wang@...iatek.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Liam Girdwood <lgirdwood@...il.com>,
        Frank Wunderlich <frank-w@...lic-files.de>,
        Josef Friedl <josef.friedl@...ed.at>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        srv_heupstream <srv_heupstream@...iatek.com>
Subject: Re: [PATCH 1/8] mfd: mt6358: refine interrupt code

On Thu, 23 Jul 2020, Hsin-Hsiung Wang wrote:

> This patch refines the interrupt related code to support new chips.

Refines in what way?

What makes this better?

> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@...iatek.com>
> ---
>  drivers/mfd/mt6358-irq.c        | 65 ++++++++++++++++++++++++-----------------
>  include/linux/mfd/mt6358/core.h |  8 ++---
>  2 files changed, 41 insertions(+), 32 deletions(-)
> 
> diff --git a/drivers/mfd/mt6358-irq.c b/drivers/mfd/mt6358-irq.c
> index db734f2..4b094e5 100644
> --- a/drivers/mfd/mt6358-irq.c
> +++ b/drivers/mfd/mt6358-irq.c
> @@ -13,7 +13,9 @@
>  #include <linux/platform_device.h>
>  #include <linux/regmap.h>
>  
> -static struct irq_top_t mt6358_ints[] = {
> +#define MTK_PMIC_REG_WIDTH 16
> +
> +static const struct irq_top_t mt6358_ints[] = {
>  	MT6358_TOP_GEN(BUCK),
>  	MT6358_TOP_GEN(LDO),
>  	MT6358_TOP_GEN(PSC),
> @@ -24,6 +26,13 @@ static struct irq_top_t mt6358_ints[] = {
>  	MT6358_TOP_GEN(MISC),
>  };
>  
> +static struct pmic_irq_data mt6358_irqd = {
> +	.num_top = ARRAY_SIZE(mt6358_ints),
> +	.num_pmic_irqs = MT6358_IRQ_NR,
> +	.top_int_status_reg = MT6358_TOP_INT_STATUS0,
> +	.pmic_ints = mt6358_ints,
> +};

Dynamically assigned driver data is usually preferred.

Why have you gone static?

-- 
Lee Jones [李琼斯]
Senior Technical Lead - Developer Services
Linaro.org │ Open source software for Arm SoCs
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