linux-kernel - Re: [RFC PATCH v5 12/14] gpu: host1x: mipi: Keep MIPI clock enabled till calibration is done

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 29 Jul 2020 16:54:29 -0700
From:   Sowjanya Komatineni <skomatineni@...dia.com>
To:     Dmitry Osipenko <digetx@...il.com>, <thierry.reding@...il.com>,
        <jonathanh@...dia.com>, <frankc@...dia.com>, <hverkuil@...all.nl>,
        <sakari.ailus@....fi>, <robh+dt@...nel.org>,
        <helen.koike@...labora.com>
CC:     <sboyd@...nel.org>, <gregkh@...uxfoundation.org>,
        <linux-media@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-i2c@...r.kernel.org>
Subject: Re: [RFC PATCH v5 12/14] gpu: host1x: mipi: Keep MIPI clock enabled
 till calibration is done


On 7/29/20 4:42 PM, Dmitry Osipenko wrote:
> 29.07.2020 20:55, Sowjanya Komatineni пишет:
>> On 7/29/20 10:08 AM, Dmitry Osipenko wrote:
>>> 28.07.2020 19:04, Sowjanya Komatineni пишет:
>>> ...
>>>>>> +void tegra_mipi_cancel_calibration(struct tegra_mipi_device *device)
>>>>>> +{
>>>>> Doesn't MIPI_CAL need to be reset here?
>>>> No need to reset MIPI CAL
>>> Could you please explain why. There is a calibration state-machine that
>>> apparently needs to be returned into initial state, does it return by
>>> itself?
>>>
>>> TRM says that MIPI block needs to be reset before of starting
>>> calibration process. The reset is completely missing in the driver, I
>>> assume it needs to be corrected with another patch.
>> TRM documented incorrectly. There is no need to reset MIPI_CAL.
>>
>> MIPI CAL is FSM and it does not hang and done bit is to indicate if
>> results are applied to pads or not.
>>
>> If we don't see done bit set meaning, MIPI CAL did not see LP-11 and
>> results are not applied to pads.
> But how to stop calibration from triggering on LP-11 once it has been
> enabled? The reset should be needed since there is no other way to reset
> the calibration state.

Its a finite state machine that goes thru fixed steps of sequence codes 
internally and holds results in registers.

When it sees LP-11 results are applied to pads.

If it does not see LP-11, next start will again trigger calibrating with 
finite sequence codes.

As per HW designers, we don't have to do any reverts when done bit is 
not set.

>> Also while multiple streams can happen in parallel and we can't reset
>> MIPI CAL as other CSI channel streams (using other pads) may also be
>> going thru calibration process in parallel depending and also DSI pads
>> also are calibrated thru same MIPI CAL controller.
> Perhaps this should be the case for a shared reset control API usage.