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Date:   Thu, 30 Jul 2020 10:27:58 -0500
From:   Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>
To:     "Lu, Brent" <brent.lu@...el.com>,
        "alsa-devel@...a-project.org" <alsa-devel@...a-project.org>
Cc:     Guennadi Liakhovetski <guennadi.liakhovetski@...ux.intel.com>,
        "Rojewski, Cezary" <cezary.rojewski@...el.com>,
        Kai Vehmanen <kai.vehmanen@...ux.intel.com>,
        Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>,
        Jie Yang <yang.jie@...ux.intel.com>,
        Takashi Iwai <tiwai@...e.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Liam Girdwood <liam.r.girdwood@...ux.intel.com>,
        Sam McNally <sammc@...omium.org>,
        Mark Brown <broonie@...nel.org>,
        Ranjani Sridharan <ranjani.sridharan@...ux.intel.com>,
        Daniel Stuart <daniel.stuart14@...il.com>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Yu-Hsuan Hsu <yuhsuan@...omium.org>,
        Damian van Soelen <dj.vsoelen@...il.com>
Subject: Re: [PATCH 2/2] ASoC: Intel: Add period size constraint on strago
 board



>> Is this patch required if you've already constrained the period sizes for the
>> platform driver in patch1?
> 
> Yes or alsa will select 320 as default period size for it.

ok, then that's a miss in your patch1. 320 samples is a multiple of 1ms 
for 48kHz rates. I think it was valid only for the 16kHz VoIP paths used 
in some versions of Android, but that we don't support in the upstream code.

To build on Takashi's answer, the real ask here is to require that the 
period be a multiple of 1ms, because that's the fundamental 
design/limitation of firmware. It doesn't matter if it's 48, 96, 192, 
240, 480, 960 samples.

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