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Message-Id: <1596198365-10105-1-git-send-email-brent.lu@intel.com>
Date: Fri, 31 Jul 2020 20:26:03 +0800
From: Brent Lu <brent.lu@...el.com>
To: alsa-devel@...a-project.org
Cc: Cezary Rojewski <cezary.rojewski@...el.com>,
Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>,
Liam Girdwood <liam.r.girdwood@...ux.intel.com>,
Jie Yang <yang.jie@...ux.intel.com>,
Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>,
Takashi Iwai <tiwai@...e.com>,
Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>,
Ranjani Sridharan <ranjani.sridharan@...ux.intel.com>,
Brent Lu <brent.lu@...el.com>, linux-kernel@...r.kernel.org,
Daniel Stuart <daniel.stuart14@...il.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Yu-Hsuan Hsu <yuhsuan@...omium.org>,
Guennadi Liakhovetski <guennadi.liakhovetski@...ux.intel.com>,
Kai Vehmanen <kai.vehmanen@...ux.intel.com>,
Sam McNally <sammc@...omium.org>,
Damian van Soelen <dj.vsoelen@...il.com>
Subject: [PATCH v3 0/2] Add period size constraint for Atom Chromebook
Two different constraints are implemented: one is in platform's CPU
DAI to enforce the period to be multiple of 1ms to align with firmware
design. The other is in Atom Chromebook's machine driver to use 240 as
period size which is selected by google.
Changes since v1:
-Add comma at the end of media_period_size array declaration.
Changes since v2:
-Use snd_pcm_hw_constraint_step to enforce the 1ms period.
Brent Lu (1):
ASoC: intel: atom: Add period size constraint
Yu-Hsuan Hsu (1):
ASoC: Intel: Add period size constraint on strago board
sound/soc/intel/atom/sst-mfld-platform-pcm.c | 11 +++++++++++
sound/soc/intel/boards/cht_bsw_max98090_ti.c | 14 +++++++++++++-
sound/soc/intel/boards/cht_bsw_rt5645.c | 14 +++++++++++++-
3 files changed, 37 insertions(+), 2 deletions(-)
--
2.7.4
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