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Message-ID: <20200805125113.rhrhy6j6uccv3jmz@uno.localdomain>
Date: Wed, 5 Aug 2020 14:51:13 +0200
From: Jacopo Mondi <jacopo@...ndi.org>
To: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
Cc: linux-media@...r.kernel.org, linux-kernel@...r.kernel.org,
Steve Longerbeam <slongerbeam@...il.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Maxime Ripard <maxime@...no.tech>,
Hans Verkuil <hverkuil@...all.nl>
Subject: Re: [PATCH] media: ov5640: Correct Bit Div register in clock tree
diagram
Hi Paul,
On Mon, Aug 03, 2020 at 11:06:58AM +0200, Paul Kocialkowski wrote:
> Although the code is correct and doing the right thing, the clock diagram
> showed the wrong register for the bit divider, which had me doubting the
> understanding of the tree. Fix this to avoid doubts in the future.
Thanks for spotting this! Correct indeed!
I'm not sure it's worth a fixes tag, but just in case:
Fixes: aa2882481cada ("media: ov5640: Adjust the clock based on the expected rate")
Acked-by: Jacopo Mondi <jacopo@...ndi.org>
>
> Signed-off-by: Paul Kocialkowski <paul.kocialkowski@...tlin.com>
> ---
> drivers/media/i2c/ov5640.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
> index 854031f0b64a..fe08a45b0426 100644
> --- a/drivers/media/i2c/ov5640.c
> +++ b/drivers/media/i2c/ov5640.c
> @@ -751,7 +751,7 @@ static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
> * +->| PLL Root Div | - reg 0x3037, bit 4
> * +-+------------+
> * | +---------+
> - * +->| Bit Div | - reg 0x3035, bits 0-3
> + * +->| Bit Div | - reg 0x3034, bits 0-3
> * +-+-------+
> * | +-------------+
> * +->| SCLK Div | - reg 0x3108, bits 0-1
> --
> 2.26.2
>
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