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Message-ID: <5a68730d-f082-a096-38eb-eaadbbc462b2@collabora.com>
Date: Mon, 10 Aug 2020 13:29:28 +0100
From: Guillaume Tucker <guillaume.tucker@...labora.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Russell King <linux@...linux.org.uk>,
Kukjin Kim <kgene@...nel.org>,
Rob Herring <robh+dt@...nel.org>, kernel@...labora.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] ARM: exynos: use DT prefetch attributes rather than
l2c_aux_val
On 03/08/2020 14:13, Krzysztof Kozlowski wrote:
> On Wed, Jul 29, 2020 at 02:47:33PM +0100, Guillaume Tucker wrote:
>> Use the standard l2c2x0 device tree bindings to enable data and
>> instruction prefetch on exynos4210 and exynos4412 and clear the
>> respective bits in the default l2c_aux_val. No other Exynos platform
>> relying on this default register value appears to be using the l2x0
>> cache.
>>
>> Signed-off-by: Guillaume Tucker <guillaume.tucker@...labora.com>
>> ---
>> arch/arm/boot/dts/exynos4210.dtsi | 2 ++
>> arch/arm/boot/dts/exynos4412.dtsi | 2 ++
>> arch/arm/mach-exynos/exynos.c | 4 ++--
>
> I will need these split between DTS and mach changes.
Of course, sorry. Fixed in v2.
Thanks,
Guillaume
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