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Date:   Wed, 12 Aug 2020 16:08:38 +0000
From:   "Lu, Brent" <brent.lu@...el.com>
To:     Pierre-Louis Bossart <pierre-louis.bossart@...ux.intel.com>,
        Takashi Iwai <tiwai@...e.de>
CC:     Yu-Hsuan Hsu <yuhsuan@...omium.org>,
        Guennadi Liakhovetski <guennadi.liakhovetski@...ux.intel.com>,
        "alsa-devel@...a-project.org" <alsa-devel@...a-project.org>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Kuninori Morimoto <kuninori.morimoto.gx@...esas.com>,
        Kai Vehmanen <kai.vehmanen@...ux.intel.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Rojewski, Cezary" <cezary.rojewski@...el.com>,
        Jie Yang <yang.jie@...ux.intel.com>,
        "Takashi Iwai" <tiwai@...e.com>,
        Liam Girdwood <liam.r.girdwood@...ux.intel.com>,
        "Sam McNally" <sammc@...omium.org>,
        Mark Brown <broonie@...nel.org>,
        "Ranjani Sridharan" <ranjani.sridharan@...ux.intel.com>,
        Daniel Stuart <daniel.stuart14@...il.com>,
        "yuhsuan@...gle.com" <yuhsuan@...gle.com>,
        Damian van Soelen <dj.vsoelen@...il.com>
Subject: RE: [PATCH v3 2/2] ASoC: Intel: Add period size constraint on strago
 board

> >
> > I also wonder what's really missing, too :)
> >
> > BTW, I took a look back at the thread, and CRAS seems using a very
> > large buffer, namely:
> > [   52.434791] sound pcmC1D0p:   PERIOD_SIZE [240:240]
> > [   52.434802] sound pcmC1D0p:   BUFFER_SIZE [204480:204480]
> 
> yes, that's 852 periods and 4.260 seconds. Never seen such values :-)

CRAS calls snd_pcm_hw_params_set_buffer_size_max() to use as large
buffer as possible. So the period size is an arbitrary number in different
platforms. Atom SST platform happens to be 256, and CML SOF platform
is 1056 for example.


Regards,
Brent


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