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Message-ID: <CAAhSdy0yV154R9EBbmQqR6mN-U7j02hGto76k+PY0W6xpJMW_A@mail.gmail.com>
Date: Wed, 12 Aug 2020 07:27:26 +0530
From: Anup Patel <anup@...infault.org>
To: Atish Patra <atishp@...shpatra.org>
Cc: Qiu Wenbo <qiuwenbo@...tium.com.cn>,
Damien Le Moal <damien.lemoal@....com>,
Guo Ren <guoren@...ux.alibaba.com>,
Vincent Chen <vincent.chen@...ive.com>,
"linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>,
Atish Patra <atish.patra@....com>,
Albert Ou <aou@...s.berkeley.edu>,
Palmer Dabbelt <palmer@...belt.com>,
Zong Li <zong.li@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Greentime Hu <greentime.hu@...ive.com>,
linux-riscv <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH] riscv: Setup exception vector for K210 properly
On Wed, Aug 12, 2020 at 12:16 AM Atish Patra <atishp@...shpatra.org> wrote:
>
> On Tue, Aug 11, 2020 at 1:41 AM Anup Patel <anup@...infault.org> wrote:
> >
> > On Tue, Aug 11, 2020 at 12:07 PM Qiu Wenbo <qiuwenbo@...tium.com.cn> wrote:
> > >
> > > Exception vector is missing on nommu platform and it is a big issue.
> > > This patch is tested in Sipeed MAIX Bit Dev Board.
> > >
> > > Fixes: 79b1feba5455 ("RISC-V: Setup exception vector early")
> > > Signed-off-by: Qiu Wenbo <qiuwenbo@...tium.com.cn>
>
> Thanks for testing it on the kendryte board.
>
> > > ---
> > > arch/riscv/kernel/smpboot.c | 1 +
> > > arch/riscv/kernel/traps.c | 11 ++++++++++-
> > > 2 files changed, 11 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> > > index 356825a57551..23cde0ceb39d 100644
> > > --- a/arch/riscv/kernel/smpboot.c
> > > +++ b/arch/riscv/kernel/smpboot.c
> > > @@ -154,6 +154,7 @@ asmlinkage __visible void smp_callin(void)
> > > mmgrab(mm);
> > > current->active_mm = mm;
> > >
> > > + trap_init();
> > > notify_cpu_starting(curr_cpuid);
> > > update_siblings_masks(curr_cpuid);
> > > set_cpu_online(curr_cpuid, 1);
> > > diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c
> > > index ad14f4466d92..a390239818ae 100644
> > > --- a/arch/riscv/kernel/traps.c
> > > +++ b/arch/riscv/kernel/traps.c
> > > @@ -174,7 +174,16 @@ int is_valid_bugaddr(unsigned long pc)
> > > }
> > > #endif /* CONFIG_GENERIC_BUG */
> > >
> > > -/* stvec & scratch is already set from head.S */
> > > +/* stvec & scratch is already set from head.S when mmu is enabled */
> > > void trap_init(void)
> > > {
> > > +#ifndef CONFIG_MMU
> > > + /*
> > > + * Set sup0 scratch register to 0, indicating to exception vector
> > > + * that we are presently executing in the kernel
> > > + */
> > > + csr_write(CSR_SCRATCH, 0);
> > > + /* Set the exception vector address */
> > > + csr_write(CSR_TVEC, &handle_exception);
> > > +#endif
> > > }
> > > --
> > > 2.28.0
> > >
> >
> > This issue seems to be only on the latest master branch of
> > Linux stable tree so this fix need not be a stable fix.
> >
> > For MMU kernel, the CSR_TVEC is setup in relocate() function
> > called from secondary_start_common() function of head.S
> >
> > For NoMMU kernel, we should set CSR_TVEC directly in
> > secondary_start_common() function as "#else" case of the
> > "#ifdef CONFIG_MMU".
> >
>
> That would enable the trap only for secondary harts. But the exception
> vector on boot hart
> is still uninitialized. How about this change ?
>
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index d0c5c316e9bb..7822054dbd88 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -77,16 +77,6 @@ relocate:
> csrw CSR_SATP, a0
> .align 2
> 1:
> - /* Set trap vector to exception handler */
> - la a0, handle_exception
> - csrw CSR_TVEC, a0
> -
> - /*
> - * Set sup0 scratch register to 0, indicating to exception vector that
> - * we are presently executing in kernel.
> - */
> - csrw CSR_SCRATCH, zero
> -
Instead of having no trap vector setup here, we should
at least have dummy trap vector (just like original code).
/* Set trap vector to spin forever to help debug */
la a0, .Lsecondary_park
csrw CSR_TVEC, a0
> /* Reload the global pointer */
> .option push
> .option norelax
> @@ -144,9 +134,23 @@ secondary_start_common:
> la a0, swapper_pg_dir
> call relocate
> #endif
> + call setup_trap_vector
> tail smp_callin
> #endif /* CONFIG_SMP */
>
> +.align 2
> +setup_trap_vector:
> + /* Set trap vector to exception handler */
> + la a0, handle_exception
> + csrw CSR_TVEC, a0
> +
> + /*
> + * Set sup0 scratch register to 0, indicating to exception vector that
> + * we are presently executing in kernel.
> + */
> + csrw CSR_SCRATCH, zero
> + ret
> +
> .Lsecondary_park:
> /* We lack SMP support or have too many harts, so park this hart */
> wfi
> @@ -240,6 +244,7 @@ clear_bss_done:
> call relocate
> #endif /* CONFIG_MMU */
>
> + call setup_trap_vector
> /* Restore C environment */
> la tp, init_task
> sw zero, TASK_TI_CPU(tp)
Apart from above, this looks good.
Regards,
Anup
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