linux-kernel - Re: [PATCH v4 7/7] irqchip: qcom-pdc: Reset all pdc interrupts during init

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Message-ID: <159743668207.33733.6711446681138353287@swboyd.mtv.corp.google.com>
Date:   Fri, 14 Aug 2020 13:24:42 -0700
From:   Stephen Boyd <swboyd@...omium.org>
To:     Maulik Shah <mkshah@...eaurora.org>, bjorn.andersson@...aro.org,
        evgreen@...omium.org, linus.walleij@...aro.org, maz@...nel.org,
        mka@...omium.org
Cc:     linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-gpio@...r.kernel.org, agross@...nel.org, tglx@...utronix.de,
        jason@...edaemon.net, dianders@...omium.org, rnayak@...eaurora.org,
        ilina@...eaurora.org, lsrao@...eaurora.org
Subject: Re: [PATCH v4 7/7] irqchip: qcom-pdc: Reset all pdc interrupts during init

Quoting Maulik Shah (2020-08-13 00:30:44)
> Hi,
> 
> On 8/12/2020 3:01 AM, Stephen Boyd wrote:
> > Quoting Maulik Shah (2020-08-10 04:21:00)
> >> Clear previous kernel's configuration during init by resetting
> >> interrupts in enable bank to zero.
> > Can you please add some more information here about why we're not
> > clearing all the pdc irqs and only the ones that are listed in DT?
> sure.
> >   Is
> > that because the pdc is shared between exception levels of the CPU and
> > so some irqs shouldn't be used? Does the DT binding need to change to
> > only list the hwirqs that are usable by the OS instead of the ones that
> > are usable for the entire system? The binding doesn't mention this at
> > all so I am just guessing here.
> 
> The IRQs specified in qcom,pdc-ranges property in DT are the only ones 
> that can be used in the current OS for the PDC.
> 
> So instead of setting entire register to zero (each reg supports 32 
> interrupts enable bit) only clearing the ones that can be used.
> 

Ok. Is something wrong with setting all the register bits to 0? Is there
something else in those registers that shouldn't be touched? Please add
these details to the commit message.