lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 21 Aug 2020 07:43:36 +0800
From:   Chun-Kuang Hu <chunkuang.hu@...nel.org>
To:     Yongqiang Niu <yongqiang.niu@...iatek.com>
Cc:     CK Hu <ck.hu@...iatek.com>, Philipp Zabel <p.zabel@...gutronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Mark Rutland <mark.rutland@....com>,
        devicetree@...r.kernel.org, David Airlie <airlied@...ux.ie>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        DRI Development <dri-devel@...ts.freedesktop.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@...ts.infradead.org>,
        Daniel Vetter <daniel@...ll.ch>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v1 07/21] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for
 multi-layer usecase

HI, Yongqiang:

Yongqiang Niu <yongqiang.niu@...iatek.com> 於 2020年8月20日 週四 下午2:06寫道:
>
> enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 8cf9f3b..427fe7f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -23,6 +23,7 @@
>  #define DISP_REG_OVL_RST                       0x0014
>  #define DISP_REG_OVL_ROI_SIZE                  0x0020
>  #define DISP_REG_OVL_DATAPATH_CON              0x0024
> +#define OVL_LAYER_SMI_ID_EN                            BIT(0)
>  #define OVL_BGCLR_SEL_IN                               BIT(2)
>  #define DISP_REG_OVL_ROI_BGCLR                 0x0028
>  #define DISP_REG_OVL_SRC_CON                   0x002c
> @@ -116,6 +117,8 @@ static void mtk_ovl_disable_vblank(struct mtk_ddp_comp *comp)
>  static void mtk_ovl_start(struct mtk_ddp_comp *comp)
>  {
>         writel_relaxed(0x1, comp->regs + DISP_REG_OVL_EN);
> +       mtk_ddp_write_mask(NULL, OVL_LAYER_SMI_ID_EN, comp,

writel_relaxed instead of mtk_ddp_write_mask.

> +                          DISP_REG_OVL_DATAPATH_CON, OVL_LAYER_SMI_ID_EN);

If this only should set in mt8192, add a private data to distinguish this.

Regards,
Chun-Kuang.

>  }
>
>  static void mtk_ovl_stop(struct mtk_ddp_comp *comp)
> --
> 1.8.1.1.dirty
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ