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Date: Sun, 23 Aug 2020 21:20:09 +0530 From: Vinod Koul <vkoul@...nel.org> To: Sivaprakash Murugesan <sivaprak@...eaurora.org> Cc: agross@...nel.org, bjorn.andersson@...aro.org, bhelgaas@...gle.com, robh+dt@...nel.org, kishon@...com, svarbanov@...sol.com, lorenzo.pieralisi@....com, p.zabel@...gutronix.de, mgautam@...eaurora.org, smuthayy@...eaurora.org, varada@...eaurora.org, linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, stable@...r.kernel.org, Selvam Sathappan Periakaruppan <speriaka@...eaurora.org> Subject: Re: [PATCH V2 3/7] phy: qcom-qmp: Use correct values for ipq8074 PCIe Gen2 PHY init On 29-07-20, 21:00, Sivaprakash Murugesan wrote: > There were some problem in ipq8074 Gen2 PCIe phy init sequence. > > 1. Few register values were wrongly updated in the phy init sequence. > 2. The register QSERDES_RX_SIGDET_CNTRL is a RX tuning parameter > register which is added in serdes table causing the wrong register > was getting updated. > 3. Clocks and resets were not added in the phy init. > > Fix these to make Gen2 PCIe port on ipq8074 devices to work. Applied to fixes, thanks > > Fixes: eef243d04b2b6 ("phy: qcom-qmp: Add support for IPQ8074") > no need of empty line here, have fixed it up while applying -- ~Vinod
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