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Message-ID: <CALCETrWZ9chgr68N7KSahJ9=vU4uqgqGZ1w_e2RH982XNEJv_Q@mail.gmail.com>
Date: Sun, 23 Aug 2020 16:12:17 -0700
From: Andy Lutomirski <luto@...nel.org>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Andy Lutomirski <luto@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
"the arch/x86 maintainers" <x86@...nel.org>
Subject: Re: [GIT pull] x86/urgent for v5.9-rc2
On Sun, Aug 23, 2020 at 3:35 PM Linus Torvalds
<torvalds@...ux-foundation.org> wrote:
>
> On Sun, Aug 23, 2020 at 3:27 PM Andy Lutomirski <luto@...nel.org> wrote:
> >
> > Every interrupt is going to load the CS and SS descriptor cache lines.
>
> Yeah, but this isn't even sharing the same GDT cache line. Those two
> are at least in the same cacheline, and hey, that is forced upon us by
> the architecture, so we don't have any choice.
>
> But I guess this lsl thing only triggers on the paranoid entry, so
> it's just NMI, DB and MCE.. Or?
Indeed. And also all the new virt garbage that keeps popping up.
--Andy
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