linux-kernel - Re: [PATCH 0/3] SiFive DDR controller and EDAC support

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Message-ID: <20200825161958.GE12107@zn.tnic>
Date:   Tue, 25 Aug 2020 18:19:58 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Palmer Dabbelt <palmer@...belt.com>
Cc:     yash.shah@...ive.com, robh+dt@...nel.org,
        Paul Walmsley <paul.walmsley@...ive.com>, mchehab@...nel.org,
        tony.luck@...el.com, aou@...s.berkeley.edu, james.morse@....com,
        rrichter@...vell.com, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-edac@...r.kernel.org, sachin.ghadi@...ive.com
Subject: Re: [PATCH 0/3] SiFive DDR controller and EDAC support

On Tue, Aug 25, 2020 at 09:02:54AM -0700, Palmer Dabbelt wrote:
> Thanks.  These look good to me and I'm happy to take them through the RISC-V
> tree, but I'm going to wait for a bit to see if there are any comments from the
> maintainers of the various subsystems before doing so.

I'll have a look at the EDAC bits these days and give you an ACK if
they're ok.

Thx.

-- 
Regards/Gruss,
    Boris.

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