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Message-Id: <1598316478-23337-1-git-send-email-cathy.zhang@intel.com>
Date:   Tue, 25 Aug 2020 08:47:56 +0800
From:   Cathy Zhang <cathy.zhang@...el.com>
To:     kvm@...r.kernel.org, linux-kernel@...r.kernel.org, x86@...nel.org
Cc:     pbonzini@...hat.com, sean.j.christopherson@...el.com,
        gregkh@...uxfoundation.org, tglx@...utronix.de,
        tony.luck@...el.com, dave.hansen@...el.com,
        kyung.min.park@...el.com, ricardo.neri-calderon@...ux.intel.com,
        vkuznets@...hat.com, wanpengli@...cent.com, jmattson@...gle.com,
        joro@...tes.org, mingo@...hat.com, bp@...en8.de, hpa@...or.com,
        jpoimboe@...hat.com, ak@...ux.intel.com, ravi.v.shankar@...el.com,
        Cathy Zhang <cathy.zhang@...el.com>
Subject: [PATCH v4 0/2] Expose new feature for Intel processor

This patchset is to introduce TSX suspend load tracking feature 
and expose it to KVM CPUID for processors which support it. KVM 
reports this information and guests can make use of it finally.

Detailed information on the instruction and CPUID feature
flag can be found in the latest "extensions" manual [1].

Changes since v3:
  * Remove SERIALIZE part from kvm patch and update commit message 

Changes since v2:
  * Combine the two kvm patches into a single one.
  * Provide features' overview introduction in kvm patch commit message.
  * Get the latest kernel patches.
  * Change definition from TSX_LDTRK to TSXLDTRK for TSX new feature.
  * Change kernel patches Author to the owner.
  * Remove SERIALIZE enumeration patch.

Reference:
[1]. https://software.intel.com/content/dam/develop/public/us/en/documents/architecture-instruction-set-extensions-programming-reference.pdf

Cathy Zhang (1):
  x86/kvm: Expose TSX Suspend Load Tracking feature

Kyung Min Park (1):
  x86/cpufeatures: Enumerate TSX suspend load address tracking
    instructions

 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kvm/cpuid.c               | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

-- 
1.8.3.1

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