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Message-ID: <202008270928.MZ35EAm5%lkp@intel.com>
Date: Thu, 27 Aug 2020 09:58:10 +0800
From: kernel test robot <lkp@...el.com>
To: Sowjanya Komatineni <skomatineni@...dia.com>,
adrian.hunter@...el.com, ulf.hansson@...aro.org,
thierry.reding@...il.com, jonathanh@...dia.com, robh+dt@...nel.org
Cc: kbuild-all@...ts.01.org, skomatineni@...dia.com,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-mmc@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v5 7/7] sdhci: tegra: Add missing TMCLK for data timeout
Hi Sowjanya,
I love your patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on tegra/for-next v5.9-rc2 next-20200826]
[cannot apply to ulf.hansson-mmc/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Sowjanya-Komatineni/Fix-timeout-clock-used-by-hardware-data-timeout/20200827-040814
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-defconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>
All errors (new ones prefixed by >>):
>> drivers/mmc/host/sdhci-tegra.c:1496:24: error: expected '}' before ';' token
1496 | NVQUIRK_HAS_TMCLK;
| ^
drivers/mmc/host/sdhci-tegra.c:1488:62: note: to match this '{'
1488 | static const struct sdhci_tegra_soc_data soc_data_tegra194 = {
| ^
drivers/mmc/host/sdhci-tegra.c: In function 'sdhci_tegra_probe':
>> drivers/mmc/host/sdhci-tegra.c:1643:6: error: implicit declaration of function 'of_clk_get_parent_count' [-Werror=implicit-function-declaration]
1643 | if (of_clk_get_parent_count(&pdev->dev) == 1) {
| ^~~~~~~~~~~~~~~~~~~~~~~
>> drivers/mmc/host/sdhci-tegra.c:1648:22: error: 'dev' undeclared (first use in this function); did you mean 'pdev'?
1648 | clk = devm_clk_get(dev, NULL)
| ^~~
| pdev
drivers/mmc/host/sdhci-tegra.c:1648:22: note: each undeclared identifier is reported only once for each function it appears in
>> drivers/mmc/host/sdhci-tegra.c:1648:32: error: expected ';' before 'if'
1648 | clk = devm_clk_get(dev, NULL)
| ^
| ;
1649 | if (IS_ERR(clk)) {
| ~~
drivers/mmc/host/sdhci-tegra.c:1682:35: error: expected ';' before 'if'
1682 | clk = devm_clk_get(dev, "sdhci")
| ^
| ;
1683 | if (IS_ERR(clk)) {
| ~~
drivers/mmc/host/sdhci-tegra.c:1727:1: warning: label 'err_clk_get' defined but not used [-Wunused-label]
1727 | err_clk_get:
| ^~~~~~~~~~~
cc1: some warnings being treated as errors
# https://github.com/0day-ci/linux/commit/51ed0e529a10cbce9dba08a11817207acb1b5bcf
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Sowjanya-Komatineni/Fix-timeout-clock-used-by-hardware-data-timeout/20200827-040814
git checkout 51ed0e529a10cbce9dba08a11817207acb1b5bcf
vim +1496 drivers/mmc/host/sdhci-tegra.c
1487
1488 static const struct sdhci_tegra_soc_data soc_data_tegra194 = {
1489 .pdata = &sdhci_tegra186_pdata,
1490 .dma_mask = DMA_BIT_MASK(39),
1491 .nvquirks = NVQUIRK_NEEDS_PAD_CONTROL |
1492 NVQUIRK_HAS_PADCALIB |
1493 NVQUIRK_DIS_CARD_CLK_CONFIG_TAP |
1494 NVQUIRK_ENABLE_SDR50 |
1495 NVQUIRK_ENABLE_SDR104 |
> 1496 NVQUIRK_HAS_TMCLK;
1497 .min_tap_delay = 96,
1498 .max_tap_delay = 139,
1499 };
1500
1501 static const struct of_device_id sdhci_tegra_dt_match[] = {
1502 { .compatible = "nvidia,tegra194-sdhci", .data = &soc_data_tegra194 },
1503 { .compatible = "nvidia,tegra186-sdhci", .data = &soc_data_tegra186 },
1504 { .compatible = "nvidia,tegra210-sdhci", .data = &soc_data_tegra210 },
1505 { .compatible = "nvidia,tegra124-sdhci", .data = &soc_data_tegra124 },
1506 { .compatible = "nvidia,tegra114-sdhci", .data = &soc_data_tegra114 },
1507 { .compatible = "nvidia,tegra30-sdhci", .data = &soc_data_tegra30 },
1508 { .compatible = "nvidia,tegra20-sdhci", .data = &soc_data_tegra20 },
1509 {}
1510 };
1511 MODULE_DEVICE_TABLE(of, sdhci_tegra_dt_match);
1512
1513 static int sdhci_tegra_add_host(struct sdhci_host *host)
1514 {
1515 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
1516 struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
1517 struct cqhci_host *cq_host;
1518 bool dma64;
1519 int ret;
1520
1521 if (!tegra_host->enable_hwcq)
1522 return sdhci_add_host(host);
1523
1524 sdhci_enable_v4_mode(host);
1525
1526 ret = sdhci_setup_host(host);
1527 if (ret)
1528 return ret;
1529
1530 host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
1531
1532 cq_host = devm_kzalloc(host->mmc->parent,
1533 sizeof(*cq_host), GFP_KERNEL);
1534 if (!cq_host) {
1535 ret = -ENOMEM;
1536 goto cleanup;
1537 }
1538
1539 cq_host->mmio = host->ioaddr + SDHCI_TEGRA_CQE_BASE_ADDR;
1540 cq_host->ops = &sdhci_tegra_cqhci_ops;
1541
1542 dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
1543 if (dma64)
1544 cq_host->caps |= CQHCI_TASK_DESC_SZ_128;
1545
1546 ret = cqhci_init(cq_host, host->mmc, dma64);
1547 if (ret)
1548 goto cleanup;
1549
1550 ret = __sdhci_add_host(host);
1551 if (ret)
1552 goto cleanup;
1553
1554 return 0;
1555
1556 cleanup:
1557 sdhci_cleanup_host(host);
1558 return ret;
1559 }
1560
1561 static int sdhci_tegra_probe(struct platform_device *pdev)
1562 {
1563 const struct of_device_id *match;
1564 const struct sdhci_tegra_soc_data *soc_data;
1565 struct sdhci_host *host;
1566 struct sdhci_pltfm_host *pltfm_host;
1567 struct sdhci_tegra *tegra_host;
1568 struct clk *clk;
1569 int rc;
1570
1571 match = of_match_device(sdhci_tegra_dt_match, &pdev->dev);
1572 if (!match)
1573 return -EINVAL;
1574 soc_data = match->data;
1575
1576 host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*tegra_host));
1577 if (IS_ERR(host))
1578 return PTR_ERR(host);
1579 pltfm_host = sdhci_priv(host);
1580
1581 tegra_host = sdhci_pltfm_priv(pltfm_host);
1582 tegra_host->ddr_signaling = false;
1583 tegra_host->pad_calib_required = false;
1584 tegra_host->pad_control_available = false;
1585 tegra_host->soc_data = soc_data;
1586
1587 if (soc_data->nvquirks & NVQUIRK_NEEDS_PAD_CONTROL) {
1588 rc = tegra_sdhci_init_pinctrl_info(&pdev->dev, tegra_host);
1589 if (rc == 0)
1590 host->mmc_host_ops.start_signal_voltage_switch =
1591 sdhci_tegra_start_signal_voltage_switch;
1592 }
1593
1594 /* Hook to periodically rerun pad calibration */
1595 if (soc_data->nvquirks & NVQUIRK_HAS_PADCALIB)
1596 host->mmc_host_ops.request = tegra_sdhci_request;
1597
1598 host->mmc_host_ops.hs400_enhanced_strobe =
1599 tegra_sdhci_hs400_enhanced_strobe;
1600
1601 if (!host->ops->platform_execute_tuning)
1602 host->mmc_host_ops.execute_tuning =
1603 tegra_sdhci_execute_hw_tuning;
1604
1605 rc = mmc_of_parse(host->mmc);
1606 if (rc)
1607 goto err_parse_dt;
1608
1609 if (tegra_host->soc_data->nvquirks & NVQUIRK_ENABLE_DDR50)
1610 host->mmc->caps |= MMC_CAP_1_8V_DDR;
1611
1612 /* HW busy detection is supported, but R1B responses are required. */
1613 host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_NEED_RSP_BUSY;
1614
1615 tegra_sdhci_parse_dt(host);
1616
1617 tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power",
1618 GPIOD_OUT_HIGH);
1619 if (IS_ERR(tegra_host->power_gpio)) {
1620 rc = PTR_ERR(tegra_host->power_gpio);
1621 goto err_power_req;
1622 }
1623
1624 /*
1625 * Tegra210 and later has separate SDMMC_LEGACY_TM clock used for
1626 * hardware data timeout clock and SW can choose TMCLK or SDCLK for
1627 * hardware data timeout through the bit USE_TMCLK_FOR_DATA_TIMEOUT
1628 * of the register SDHCI_TEGRA_VENDOR_SYS_SW_CTRL.
1629 *
1630 * USE_TMCLK_FOR_DATA_TIMEOUT bit default is set to 1 and SDMMC uses
1631 * 12Mhz TMCLK which is advertised in host capability register.
1632 * With TMCLK of 12Mhz provides maximum data timeout period that can
1633 * be achieved is 11s better than using SDCLK for data timeout.
1634 *
1635 * So, TMCLK is set to 12Mhz and kept enabled all the time on SoC's
1636 * supporting separate TMCLK.
1637 *
1638 * Old device tree has single sdhci clock. So with addition of TMCLK,
1639 * retrieving sdhci clock by "sdhci" clock name based on number of
1640 * clocks in sdhci device node.
1641 */
1642
> 1643 if (of_clk_get_parent_count(&pdev->dev) == 1) {
1644 if (soc_data->nvquirks & NVQUIRK_HAS_TMCLK)
1645 dev_warn(&pdev->dev,
1646 "missing tmclk in the device tree\n");
1647
> 1648 clk = devm_clk_get(dev, NULL)
1649 if (IS_ERR(clk)) {
1650 rc = PTR_ERR(clk);
1651
1652 if (rc != -EPROBE_DEFER)
1653 dev_err(&pdev->dev,
1654 "failed to get sdhci clock: %d\n", rc);
1655
1656 goto err_power_req;
1657 }
1658 } else {
1659 if (soc_data->nvquirks & NVQUIRK_HAS_TMCLK) {
1660 clk = devm_clk_get(&pdev->dev, "tmclk");
1661 if (IS_ERR(clk)) {
1662 rc = PTR_ERR(clk);
1663 if (rc == -EPROBE_DEFER)
1664 goto err_power_req;
1665
1666 dev_warn(&pdev->dev,
1667 "failed to get tmclk: %d\n", rc);
1668 clk = NULL;
1669 }
1670
1671 clk_set_rate(clk, 12000000);
1672 rc = clk_prepare_enable(clk);
1673 if (rc) {
1674 dev_err(&pdev->dev,
1675 "failed to enable tmclk: %d\n", rc);
1676 goto err_power_req;
1677 }
1678
1679 tegra_host->tmclk = clk;
1680 }
1681
1682 clk = devm_clk_get(dev, "sdhci")
1683 if (IS_ERR(clk)) {
1684 rc = PTR_ERR(clk);
1685
1686 if (rc != -EPROBE_DEFER)
1687 dev_err(&pdev->dev,
1688 "failed to get sdhci clock: %d\n", rc);
1689
1690 goto err_clk_get;
1691 }
1692 }
1693
1694 clk_prepare_enable(clk);
1695 pltfm_host->clk = clk;
1696
1697 tegra_host->rst = devm_reset_control_get_exclusive(&pdev->dev,
1698 "sdhci");
1699 if (IS_ERR(tegra_host->rst)) {
1700 rc = PTR_ERR(tegra_host->rst);
1701 dev_err(&pdev->dev, "failed to get reset control: %d\n", rc);
1702 goto err_rst_get;
1703 }
1704
1705 rc = reset_control_assert(tegra_host->rst);
1706 if (rc)
1707 goto err_rst_get;
1708
1709 usleep_range(2000, 4000);
1710
1711 rc = reset_control_deassert(tegra_host->rst);
1712 if (rc)
1713 goto err_rst_get;
1714
1715 usleep_range(2000, 4000);
1716
1717 rc = sdhci_tegra_add_host(host);
1718 if (rc)
1719 goto err_add_host;
1720
1721 return 0;
1722
1723 err_add_host:
1724 reset_control_assert(tegra_host->rst);
1725 err_rst_get:
1726 clk_disable_unprepare(pltfm_host->clk);
1727 err_clk_get:
1728 clk_disable_unprepare(tegra_host->tmclk);
1729 err_power_req:
1730 err_parse_dt:
1731 sdhci_pltfm_free(pdev);
1732 return rc;
1733 }
1734
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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