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Message-ID: <20200902134805.GI1362448@hirez.programming.kicks-ass.net>
Date: Wed, 2 Sep 2020 15:48:05 +0200
From: peterz@...radead.org
To: Leo Yan <leo.yan@...aro.org>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Ingo Molnar <mingo@...hat.com>, Wei Li <liwei391@...wei.com>,
Al Grant <al.grant@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
Adrian Hunter <adrian.hunter@...el.com>,
"Naveen N. Rao" <naveen.n.rao@...ux.vnet.ibm.com>,
Nick Desaulniers <ndesaulniers@...gle.com>,
Kemeng Shi <shikemeng@...wei.com>,
Ian Rogers <irogers@...gle.com>,
John Garry <john.garry@...wei.com>,
Stephane Eranian <eranian@...gle.com>,
Nick Gasson <nick.gasson@....com>,
Andi Kleen <ak@...ux.intel.com>,
Steve MacLean <Steve.MacLean@...rosoft.com>,
"Gustavo A. R. Silva" <gustavoars@...nel.org>,
Kan Liang <kan.liang@...ux.intel.com>,
Will Deacon <will@...nel.org>,
James Clark <james.clark@....com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/6] perf tsc: Add rdtsc() for Arm64
On Wed, Sep 02, 2020 at 02:21:27PM +0100, Leo Yan wrote:
> The system register CNTVCT_EL0 can be used to retrieve the counter from
> user space. Add rdtsc() for Arm64.
> +u64 rdtsc(void)
> +{
> + u64 val;
Would it make sense to put a comment in that this counter is/could-be
'short' ? Because unlike x86-TSC, this thing isn't architecturally
specified to be 64bits wide.
> + asm volatile("mrs %0, cntvct_el0" : "=r" (val));
> +
> + return val;
> +}
> --
> 2.17.1
>
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