lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200910221918.GA590446@xps15>
Date:   Thu, 10 Sep 2020 16:19:18 -0600
From:   Mathieu Poirier <mathieu.poirier@...aro.org>
To:     Tingwei Zhang <tingwei@...eaurora.org>
Cc:     Suzuki K Poulose <suzuki.poulose@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Mike Leach <mike.leach@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Leo Yan <leo.yan@...aro.org>,
        Randy Dunlap <rdunlap@...radead.org>,
        Russell King <linux@...linux.org.uk>,
        Kim Phillips <kim.phillips@....com>,
        Mian Yousaf Kaukab <ykaukab@...e.de>, tsoni@...eaurora.org,
        Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org>,
        Mao Jinlong <jinlmao@...eaurora.org>,
        coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v10 04/24] coresight: add coresight prefix to barrier_pkt

On Fri, Aug 21, 2020 at 11:44:25AM +0800, Tingwei Zhang wrote:
> Add coresight prefix to make it specific. It will be a export symbol.
> 
> Signed-off-by: Mian Yousaf Kaukab <ykaukab@...e.de>
> Signed-off-by: Tingwei Zhang <tingwei@...eaurora.org>
> Reviewed-by: Suzuki K Poulose <suzuki.poulose@....com>
> Reviewed-by: Mathieu Poirier <mathieu.poirier@...aro.org>
> ---
>  drivers/hwtracing/coresight/coresight-etb10.c   | 2 +-
>  drivers/hwtracing/coresight/coresight-priv.h    | 8 ++++----
>  drivers/hwtracing/coresight/coresight-tmc-etf.c | 2 +-
>  drivers/hwtracing/coresight/coresight.c         | 2 +-
>  4 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c
> index 03e3f2590191..04ee9cda988d 100644
> --- a/drivers/hwtracing/coresight/coresight-etb10.c
> +++ b/drivers/hwtracing/coresight/coresight-etb10.c
> @@ -525,7 +525,7 @@ static unsigned long etb_update_buffer(struct coresight_device *csdev,
>  
>  	cur = buf->cur;
>  	offset = buf->offset;
> -	barrier = barrier_pkt;
> +	barrier = coresight_barrier_pkt;
>  
>  	for (i = 0; i < to_read; i += 4) {
>  		buf_ptr = buf->data_pages[cur] + offset;
> diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
> index d801a2755432..dcb8aeb6af62 100644
> --- a/drivers/hwtracing/coresight/coresight-priv.h
> +++ b/drivers/hwtracing/coresight/coresight-priv.h
> @@ -66,8 +66,8 @@ static DEVICE_ATTR_RO(name)
>  #define coresight_simple_reg64(type, name, lo_off, hi_off)		\
>  	__coresight_simple_func(type, NULL, name, lo_off, hi_off)
>  
> -extern const u32 barrier_pkt[4];
> -#define CORESIGHT_BARRIER_PKT_SIZE (sizeof(barrier_pkt))
> +extern const u32 coresight_barrier_pkt[4];
> +#define CORESIGHT_BARRIER_PKT_SIZE (sizeof(coresight_barrier_pkt))
>  
>  enum etm_addr_type {
>  	ETM_ADDR_TYPE_NONE,
> @@ -104,10 +104,10 @@ struct cs_buffers {
>  static inline void coresight_insert_barrier_packet(void *buf)
>  {
>  	if (buf)
> -		memcpy(buf, barrier_pkt, CORESIGHT_BARRIER_PKT_SIZE);
> +		memcpy(buf, coresight_barrier_pkt,
> +				CORESIGHT_BARRIER_PKT_SIZE);

Didn't I comment on this before?

>  }
>  
> -
>  static inline void CS_LOCK(void __iomem *addr)
>  {
>  	do {
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> index 6375504ba8b0..44402d413ebb 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c
> @@ -519,7 +519,7 @@ static unsigned long tmc_update_etf_buffer(struct coresight_device *csdev,
>  
>  	cur = buf->cur;
>  	offset = buf->offset;
> -	barrier = barrier_pkt;
> +	barrier = coresight_barrier_pkt;
>  
>  	/* for every byte to read */
>  	for (i = 0; i < to_read; i += 4) {
> diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c
> index e9c90f2de34a..d515088cc47d 100644
> --- a/drivers/hwtracing/coresight/coresight.c
> +++ b/drivers/hwtracing/coresight/coresight.c
> @@ -53,7 +53,7 @@ static struct list_head *stm_path;
>   * beginning of the data collected in a buffer.  That way the decoder knows that
>   * it needs to look for another sync sequence.
>   */
> -const u32 barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
> +const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
>  
>  static int coresight_id_match(struct device *dev, void *data)
>  {
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ