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Message-ID: <c9d45617-6de9-7e49-0c82-151e67fff61d@st.com>
Date: Fri, 11 Sep 2020 15:49:59 +0200
From: Arnaud POULIQUEN <arnaud.pouliquen@...com>
To: Rob Herring <robh@...nel.org>
CC: Alexandre TORGUE <alexandre.torgue@...com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-stm32@...md-mailman.stormreply.com"
<linux-stm32@...md-mailman.stormreply.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-remoteproc@...r.kernel.org" <linux-remoteproc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Fabien DESSENNE <fabien.dessenne@...com>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Ohad Ben-Cohen <ohad@...ery.com>,
Bjorn Andersson <bjorn.andersson@...aro.org>
Subject: Re: [PATCH 2/3] dt-bindings: remoteproc: stm32_rproc: update for
firmware synchronization
Hi Rob,
On 9/9/20 10:22 PM, Rob Herring wrote:
> On Thu, Aug 27, 2020 at 09:21:00AM +0200, Arnaud Pouliquen wrote:
>> Add new properties description used to attach to a pre-loaded
>> firmware according to the commit 9276536f455b3
>> ("remoteproc: stm32: Parse syscon that will manage M4 synchronisation")
>> which updates the driver part.
>>
>> Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@...com>
>> ---
>> .../bindings/remoteproc/st,stm32-rproc.yaml | 19 +++++++++++++++++++
>> 1 file changed, 19 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
>> index 4ffa25268fcc..e50957d86b1c 100644
>> --- a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
>> +++ b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml
>> @@ -96,6 +96,25 @@ properties:
>> 3rd cell: register bitmask for the deep sleep bit
>> maxItems: 1
>>
>> + st,syscfg-m4-state:
>> + $ref: "/schemas/types.yaml#/definitions/phandle-array"
>> + description: |
>> + Reference to the tamp register which exposes the Cortex-M4 state.
>> + 1st cell: phandle to syscon block
>> + 2nd cell: register offset containing the Cortex-M4 state
>> + 3rd cell: register bitmask for the Cortex-M4 state
>> + maxItems: 1
>> +
>> + st,syscfg-rsc-tbl:
>> + $ref: "/schemas/types.yaml#/definitions/phandle-array"
>> + description: |
>> + Reference to the tamp register which references the Cortex-M4
>> + resource table address.
>> + 1st cell: phandle to syscon block
>> + 2nd cell: register offset containing the resource table address
>> + 3rd cell: register bitmask for the resource table address
>> + maxItems: 1
>
> Why can't these be implied? You can lookup the tamp syscon by
> compatible.
I just made a copy/past of the "st,syscfg-pdds" syscon description available in the same file [1]
I can provide a shorter descriptions, something like this:
description: |
Reference to the tamp syscon register and bitmask which contains the Cortex-M4
resource table address.
maxItems: 1
Would this meet your expectations? If yes, I will also add in next version an extra patch to fix [1]
[1] https://elixir.bootlin.com/linux/v5.9-rc3/source/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml#L90
>
> Please add these to the example.
I will extend the example with these properties
Thanks,
Arnaud
>
>> +
>> st,auto-boot:
>> $ref: /schemas/types.yaml#/definitions/flag
>> description:
>> --
>> 2.17.1
>>
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