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Message-ID: <5F616D92.3070201@hisilicon.com>
Date: Wed, 16 Sep 2020 09:42:42 +0800
From: Wei Xu <xuwei5@...ilicon.com>
To: Andre Przywara <andre.przywara@....com>, <soc@...nel.org>
CC: Rob Herring <robh@...nel.org>, <devicetree@...r.kernel.org>,
Chanho Min <chanho.min@....com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 6/6] ARM: dts: hisilicon: Fix SP805 clocks
On 2020/9/7 20:18, Andre Przywara wrote:
> The SP805 DT binding requires two clocks to be specified, but
> Hisilicon platform DTs currently only specify one clock.
>
> In practice, Linux would pick a clock named "apb_pclk" for the bus
> clock, and the Linux and U-Boot SP805 driver would use the first clock
> to derive the actual watchdog counter frequency.
>
> Since currently both are the very same clock, we can just double the
> clock reference, and add the correct clock-names, to match the binding.
>
> Signed-off-by: Andre Przywara <andre.przywara@....com>
Thanks!
Applied to the hisilicon arm32 dt tree.
Best Regards,
Wei
> ---
> arch/arm/boot/dts/hisi-x5hd2.dtsi | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
> index 3ee7967c202d..e2dbf1d8a67b 100644
> --- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
> +++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
> @@ -370,8 +370,9 @@
> arm,primecell-periphid = <0x00141805>;
> reg = <0xa2c000 0x1000>;
> interrupts = <0 29 4>;
> - clocks = <&clock HIX5HD2_WDG0_RST>;
> - clock-names = "apb_pclk";
> + clocks = <&clock HIX5HD2_WDG0_RST>,
> + <&clock HIX5HD2_WDG0_RST>;
> + clock-names = "wdog_clk", "apb_pclk";
> };
> };
>
>
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