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Message-ID: <CAD=FV=WtSEB6-M8x564t=RuSEKHwH3YvcmuZ9VGpxY+5kcL7rA@mail.gmail.com>
Date: Fri, 18 Sep 2020 06:58:55 -0700
From: Doug Anderson <dianders@...omium.org>
To: Srinivasa Rao Mandadapu <srivasam@...eaurora.org>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
Rohit kumar <rohitkr@...eaurora.org>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
Ajit Pandey <ajitp@...eaurora.org>,
Cheng-Yi Chiang <cychiang@...omium.org>,
V Sujith Kumar Reddy <vsujithk@...eaurora.org>
Subject: Re: [PATCH v3] arm64: dts: qcom: sc7180: Add lpass cpu node for I2S driver
Hi,
On Fri, Sep 18, 2020 at 6:18 AM Srinivasa Rao Mandadapu
<srivasam@...eaurora.org> wrote:
>
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -1742,6 +1742,45 @@
> };
> };
>
> + sec_mi2s_active: sec-mi2s-active {
> + pinmux {
> + pins = "gpio49", "gpio50", "gpio51";
> + function = "mi2s_1";
> + };
> +
> + pinconf {
> + pins = "gpio49", "gpio50", "gpio51";;
There are still two ";" on the above line.
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