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Message-ID: <20200923212925.GC15101@linux.intel.com>
Date: Wed, 23 Sep 2020 14:29:25 -0700
From: Sean Christopherson <sean.j.christopherson@...el.com>
To: Andy Lutomirski <luto@...nel.org>
Cc: Yu-cheng Yu <yu-cheng.yu@...el.com>, X86 ML <x86@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
LKML <linux-kernel@...r.kernel.org>,
"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
Linux-MM <linux-mm@...ck.org>,
linux-arch <linux-arch@...r.kernel.org>,
Linux API <linux-api@...r.kernel.org>,
Arnd Bergmann <arnd@...db.de>,
Balbir Singh <bsingharora@...il.com>,
Borislav Petkov <bp@...en8.de>,
Cyrill Gorcunov <gorcunov@...il.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Eugene Syromiatnikov <esyr@...hat.com>,
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"H.J. Lu" <hjl.tools@...il.com>, Jann Horn <jannh@...gle.com>,
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Peter Zijlstra <peterz@...radead.org>,
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"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
Vedvyas Shanbhogue <vedvyas.shanbhogue@...el.com>,
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Weijiang Yang <weijiang.yang@...el.com>
Subject: Re: [PATCH v12 8/8] x86: Disallow vsyscall emulation when CET is
enabled
On Mon, Sep 21, 2020 at 04:48:25PM -0700, Andy Lutomirski wrote:
> On Mon, Sep 21, 2020 at 3:37 PM Yu-cheng Yu <yu-cheng.yu@...el.com> wrote:
> > diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c
> > b/arch/x86/entry/vsyscall/vsyscall_64.c
> > index 44c33103a955..0131c9f7f9c5 100644
> > --- a/arch/x86/entry/vsyscall/vsyscall_64.c
> > +++ b/arch/x86/entry/vsyscall/vsyscall_64.c
> > @@ -38,6 +38,9 @@
> > #include <asm/fixmap.h>
> > #include <asm/traps.h>
> > #include <asm/paravirt.h>
> > +#include <asm/fpu/xstate.h>
> > +#include <asm/fpu/types.h>
> > +#include <asm/fpu/internal.h>
> >
> > #define CREATE_TRACE_POINTS
> > #include "vsyscall_trace.h"
> > @@ -286,6 +289,32 @@ bool emulate_vsyscall(unsigned long error_code,
> > /* Emulate a ret instruction. */
> > regs->ip = caller;
> > regs->sp += 8;
> > +
> > + if (current->thread.cet.shstk_size ||
> > + current->thread.cet.ibt_enabled) {
> > + u64 r;
> > +
> > + fpregs_lock();
> > + if (test_thread_flag(TIF_NEED_FPU_LOAD))
> > + __fpregs_load_activate();
>
> Wouldn't this be nicer if you operated on the memory image, not the registers?
>
> > +
> > +#ifdef CONFIG_X86_INTEL_BRANCH_TRACKING_USER
> > + /* Fixup branch tracking */
> > + if (current->thread.cet.ibt_enabled) {
> > + rdmsrl(MSR_IA32_U_CET, r);
> > + wrmsrl(MSR_IA32_U_CET, r & ~CET_WAIT_ENDBR);
> > + }
> > +#endif
>
> Seems reasonable on first glance.
>
> > +
> > +#ifdef CONFIG_X86_INTEL_SHADOW_STACK_USER
> > + /* Unwind shadow stack. */
> > + if (current->thread.cet.shstk_size) {
> > + rdmsrl(MSR_IA32_PL3_SSP, r);
> > + wrmsrl(MSR_IA32_PL3_SSP, r + 8);
> > + }
> > +#endif
>
> What happens if the result is noncanonical? A quick skim of the SDM
> didn't find anything. This latter issue goes away if you operate on
> the memory image, though -- writing a bogus value is just fine, since
> the FP restore will handle it.
#GP, the SSP MSRs do canonical checks.
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