linux-kernel - [PATCH 3/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node

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Message-Id: <20200923005858.148261-2-icenowy@aosc.io>
Date:   Wed, 23 Sep 2020 08:58:54 +0800
From:   Icenowy Zheng <icenowy@...c.io>
To:     Rob Herring <robh+dt@...nel.org>,
        Maxime Ripard <mripard@...nel.org>,
        Chen-Yu Tsai <wens@...e.org>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com,
        Icenowy Zheng <icenowy@...c.io>
Subject: [PATCH 3/7] ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node

The CSI1 controller of V3/V3s/S3/S3L chips is used for parallel CSI.

Add the device tree node of it.

Signed-off-by: Icenowy Zheng <icenowy@...c.io>
---
 arch/arm/boot/dts/sun8i-v3s.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 4cfdf193cf88..3e079973672d 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -488,6 +488,18 @@ spi0: spi@...8000 {
 			#size-cells = <0>;
 		};
 
+		csi1: camera@...4000 {
+			compatible = "allwinner,sun8i-v3s-csi";
+			reg = <0x01cb4000 0x3000>;
+			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_CSI>,
+				 <&ccu CLK_CSI1_SCLK>,
+				 <&ccu CLK_DRAM_CSI>;
+			clock-names = "bus", "mod", "ram";
+			resets = <&ccu RST_BUS_CSI>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@...1000 {
 			compatible = "arm,gic-400";
 			reg = <0x01c81000 0x1000>,
-- 
2.27.0