linux-kernel - Re: [PATCH net] net: phy: realtek: fix rtl8211e rx/tx delay config

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Message-ID: <20200925144042.GI3821492@lunn.ch>
Date:   Fri, 25 Sep 2020 16:40:42 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Willy Liu <willy.liu@...ltek.com>
Cc:     hkallweit1@...il.com, linux@...linux.org.uk, davem@...emloft.net,
        kuba@...nel.org, fancer.lancer@...il.com, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, ryankao@...ltek.com,
        kevans@...eBSD.org
Subject: Re: [PATCH net] net: phy: realtek: fix rtl8211e rx/tx delay config

On Fri, Sep 25, 2020 at 03:25:15PM +0800, Willy Liu wrote:
> There are two chip pins named TXDLY and RXDLY which actually adds the 2ns
> delays to TXC and RXC for TXD/RXD latching. These two pins can config via
> 4.7k-ohm resistor to 3.3V hw setting, but also config via software setting
> (extension page 0xa4 register 0x1c bit13 12 and 11).
> 
> The configuration register definitions from table 13 official PHY datasheet:
> PHYAD[2:0] = PHY Address
> AN[1:0] = Auto-Negotiation
> Mode = Interface Mode Select
> RX Delay = RX Delay
> TX Delay = TX Delay
> SELRGV = RGMII/GMII Selection
> 
> This table describes how to config these hw pins via external pull-high or pull-
> low resistor.
> 
> It is a misunderstanding that mapping it as register bits below:
> 8:6 = PHY Address
> 5:4 = Auto-Negotiation
> 3 = Interface Mode Select
> 2 = RX Delay
> 1 = TX Delay
> 0 = SELRGV
> So I removed these descriptions above and add related settings as below:
> 14 = reserved
> 13 = force Tx RX Delay controlled by bit12 bit11
> 12 = Tx Delay
> 11 = Rx Delay
> 10:0 = Test && debug settings reserved by realtek

Hi Willy

Thanks for adding a full description of what the bits do.

Please in future add a version number to the subject line.

[PATCH net v3] .....

So we know which is the latest version.

I think the fix is actually wrong.

        /* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */
        switch (phydev->interface) {
        case PHY_INTERFACE_MODE_RGMII:
                val = 0;
                break;
        case PHY_INTERFACE_MODE_RGMII_ID:
                val = RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
                break;
        case PHY_INTERFACE_MODE_RGMII_RXID:
                val = RTL8211E_RX_DELAY;
                break;
        case PHY_INTERFACE_MODE_RGMII_TXID:
                val = RTL8211E_TX_DELAY;
                break;
        default: /* the rest of the modes imply leaving delays as is. */
                return 0;
        }

If the user requests RGMII, we really should set it to RGMII, not
leave the strapping configuration enabled. That means we need to turn
on the force bit, and the two delays off. Please also change the
case PHY_INTERFACE_MODE_RGMII.

Thanks
	Andrew