linux-kernel - Re: [PATCH] RISC-V: Check clint_time

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <alpine.LFD.2.21.2009261054270.3561363@eddie.linux-mips.org>
Date:   Sat, 26 Sep 2020 11:09:41 +0100 (BST)
From:   "Maciej W. Rozycki" <macro@...ux-mips.org>
To:     Damien Le Moal <Damien.LeMoal@....com>
cc:     "paul.walmsley@...ive.com" <paul.walmsley@...ive.com>,
        "palmer@...belt.com" <palmer@...belt.com>,
        "palmerdabbelt@...gle.com" <palmerdabbelt@...gle.com>,
        Anup Patel <Anup.Patel@....com>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "anup@...infault.org" <anup@...infault.org>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        Alistair Francis <Alistair.Francis@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Atish Patra <Atish.Patra@....com>
Subject: Re: [PATCH] RISC-V: Check clint_time_val before use

On Sat, 26 Sep 2020, Damien Le Moal wrote:

> > > Applying this on top of rc6, I now get a hang on Kendryte boot...
> > > No problems without the patch on the other hand.
> > 
> > Not sure about the issue with Kendryte but I get a crash on
> > QEMU virt machine without this patch.
> 
> With this applied in addition to your patch, it works.
> 
> diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-
> clint.c
> index d17367dee02c..8dbec85979fd 100644
> --- a/drivers/clocksource/timer-clint.c
> +++ b/drivers/clocksource/timer-clint.c
> @@ -37,7 +37,7 @@ static unsigned long clint_timer_freq;
>  static unsigned int clint_timer_irq;
>  
>  #ifdef CONFIG_RISCV_M_MODE
> -u64 __iomem *clint_time_val;
> +u64 __iomem *clint_time_val = NULL;
>  #endif

 Hmm, BSS initialisation issue?

  Maciej