lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <8a99b16ae3037487b762fb1bbcd81b576d9e11ab.camel@wdc.com>
Date:   Sat, 26 Sep 2020 10:25:14 +0000
From:   Damien Le Moal <Damien.LeMoal@....com>
To:     "macro@...ux-mips.org" <macro@...ux-mips.org>
CC:     "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
        Alistair Francis <Alistair.Francis@....com>,
        "palmerdabbelt@...gle.com" <palmerdabbelt@...gle.com>,
        Anup Patel <Anup.Patel@....com>,
        "paul.walmsley@...ive.com" <paul.walmsley@...ive.com>,
        "aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
        "palmer@...belt.com" <palmer@...belt.com>,
        "anup@...infault.org" <anup@...infault.org>,
        Atish Patra <Atish.Patra@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] RISC-V: Check clint_time_val before use

On Sat, 2020-09-26 at 11:09 +0100, Maciej W. Rozycki wrote:
> On Sat, 26 Sep 2020, Damien Le Moal wrote:
> 
> > > > Applying this on top of rc6, I now get a hang on Kendryte boot...
> > > > No problems without the patch on the other hand.
> > > 
> > > Not sure about the issue with Kendryte but I get a crash on
> > > QEMU virt machine without this patch.
> > 
> > With this applied in addition to your patch, it works.
> > 
> > diff --git a/drivers/clocksource/timer-clint.c b/drivers/clocksource/timer-
> > clint.c
> > index d17367dee02c..8dbec85979fd 100644
> > --- a/drivers/clocksource/timer-clint.c
> > +++ b/drivers/clocksource/timer-clint.c
> > @@ -37,7 +37,7 @@ static unsigned long clint_timer_freq;
> >  static unsigned int clint_timer_irq;
> >  
> >  #ifdef CONFIG_RISCV_M_MODE
> > -u64 __iomem *clint_time_val;
> > +u64 __iomem *clint_time_val = NULL;
> >  #endif
> 
>  Hmm, BSS initialisation issue?

Not a static variable, so it is not in BSS, no ?

> 
>   Maciej

-- 
Damien Le Moal
Western Digital

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ