linux-kernel - [PATCH 4/7] drm/msm/a5xx: Reset VBIF before PC only on A510 and A530

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Message-Id: <20200926125146.12859-5-kholk11@gmail.com>
Date:   Sat, 26 Sep 2020 14:51:43 +0200
From:   kholk11@...il.com
To:     robdclark@...il.com
Cc:     sean@...rly.run, airlied@...ux.ie, daniel@...ll.ch,
        jcrouse@...eaurora.org, konradybcio@...il.com, kholk11@...il.com,
        marijns95@...il.com, martin.botka1@...il.com,
        linux-arm-msm@...r.kernel.org, freedreno@...ts.freedesktop.org,
        phone-devel@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 4/7] drm/msm/a5xx: Reset VBIF before PC only on A510 and A530

From: AngeloGioacchino Del Regno <kholk11@...il.com>

Resetting the VBIF before power collapse is done to avoid getting
bogus FIFO entries during the suspend sequence or subsequent resume,
but this is doable only on Adreno 510 and Adreno 530, as the other
units will tendentially lock up.
Especially on Adreno 508, the GPU will show lockups and very bad
slownesses after processing the first frame.

Avoiding to execute the RBBM SW Reset before suspend will stop the
lockup issue from happening on at least Adreno 508/509/512.

Signed-off-by: AngeloGioacchino Del Regno <kholk11@...il.com>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 9bcbf6cd5a28..00df5de3c8e3 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -1306,10 +1306,12 @@ static int a5xx_pm_suspend(struct msm_gpu *gpu)
 
 	/*
 	 * Reset the VBIF before power collapse to avoid issue with FIFO
-	 * entries
+	 * entries on Adreno A510 and A530 (the others will tend to lock up)
 	 */
-	gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
-	gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
+	if (adreno_is_a510(adreno_gpu) || adreno_is_a530(adreno_gpu)) {
+		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x003C0000);
+		gpu_write(gpu, REG_A5XX_RBBM_BLOCK_SW_RESET_CMD, 0x00000000);
+	}
 
 	return msm_gpu_pm_suspend(gpu);
 }
-- 
2.28.0