linux-kernel - [PATCH 7/7] drm/msm/a5xx: Disable UCHE global filter

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Date:   Sat, 26 Sep 2020 14:51:46 +0200
From:   kholk11@...il.com
To:     robdclark@...il.com
Cc:     sean@...rly.run, airlied@...ux.ie, daniel@...ll.ch,
        jcrouse@...eaurora.org, konradybcio@...il.com, kholk11@...il.com,
        marijns95@...il.com, martin.botka1@...il.com,
        linux-arm-msm@...r.kernel.org, freedreno@...ts.freedesktop.org,
        phone-devel@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 7/7] drm/msm/a5xx: Disable UCHE global filter

From: Konrad Dybcio <konradybcio@...il.com>

Port over the command from downstream to prevent undefined
behaviour.

Signed-off-by: Konrad Dybcio <konradybcio@...il.com>
Signed-off-by: AngeloGioacchino Del Regno <kholk11@...il.com>
---
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index bdc852e7d979..71cd8a3a6bf1 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -722,6 +722,9 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
 	    adreno_is_a512(adreno_gpu))
 		gpu_rmw(gpu, REG_A5XX_RB_DBG_ECO_CNTL, 0, (1 << 9));
 
+	/* Disable UCHE global filter as SP can invalidate/flush independently */
+	gpu_write(gpu, 0x00000E81, BIT(29));
+
 	/* Enable USE_RETENTION_FLOPS */
 	gpu_write(gpu, REG_A5XX_CP_CHICKEN_DBG, 0x02000000);
 
-- 
2.28.0