lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 28 Sep 2020 06:17:45 +0000
From:   Joel Stanley <joel@....id.au>
To:     Tomer Maimon <tmaimon77@...il.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Avi Fishman <avifishman70@...il.com>,
        Tali Perry <tali.perry1@...il.com>,
        Patrick Venture <venture@...gle.com>,
        Nancy Yuen <yuenn@...gle.com>,
        Benjamin Fair <benjaminfair@...gle.com>,
        devicetree <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        OpenBMC Maillist <openbmc@...ts.ozlabs.org>
Subject: Re: [PATCH v7 2/5] arm: dts: modify NPCM7xx device tree timer
 register size

On Wed, 23 Sep 2020 at 16:48, Tomer Maimon <tmaimon77@...il.com> wrote:
>
> Modify NPCM7xx device tree timer register size
> from 0x50 to 0x1C to control only the timer registers
> and not other hw modules.
>
> Signed-off-by: Tomer Maimon <tmaimon77@...il.com>

Reviewed-by: Joel Stanley <joel@....id.au>

> ---
>  arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> index 16a28c5c4131..72e364054e72 100644
> --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
> @@ -120,7 +120,7 @@
>                         timer0: timer@...0 {
>                                 compatible = "nuvoton,npcm750-timer";
>                                 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> -                               reg = <0x8000 0x50>;
> +                               reg = <0x8000 0x1C>;
>                                 clocks = <&clk NPCM7XX_CLK_TIMER>;
>                         };
>
> --
> 2.22.0
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ