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Message-ID: <OSAPR01MB4227CE6CC27B4EF48539E4548F330@OSAPR01MB4227.jpnprd01.prod.outlook.com>
Date: Wed, 30 Sep 2020 08:51:54 +0000
From: "ito-yuichi@...itsu.com" <ito-yuichi@...itsu.com>
To: 'Marc Zyngier' <maz@...nel.org>
CC: "sumit.garg@...aro.org" <sumit.garg@...aro.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"jason@...edaemon.net" <jason@...edaemon.net>,
"catalin.marinas@....com" <catalin.marinas@....com>,
"will@...nel.org" <will@...nel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 0/2] Enable support IPI_CPU_CRASH_STOP to be pseudo-NMI
Hi Marc
>
> On 2020-09-29 06:50, ito-yuichi@...itsu.com wrote:
> > Hi Marc
>
> [...]
>
> >> >> The patch has been tested on ThunderX.
> >>
> >> Which ThunderX? TX2 (at least the incarnation I used in the past)
> >> wasn't able
> >> to correctly deal with priorities.
> >
> > I tried it with ThunderX CN8890.
> > If you tell me steps to reproduce the problem of TX2, I will
> > investigate it with TX as well.
>
> PMR_EL1 reporting fantasy values, non-uniform priority support across
> the interrupt classes, and generally prone to lockups. The original TX
> is a very different machine though (TX 1 and 2 only share the engraving
> of the manufacturer on the heat-spreader).
Thank you for the information.
I will check if we have a ThunderX1 or X2 environment. If we have either one, I will investigate it.
> M.
> --
> Jazz is not dead. It just smells funny...
Thank you and best regards,
Yuichi Ito
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