linux-kernel - Re: [PATCH v6 11/17] dt-bindings: arm: hisilicon: convert hisilicon,cpuctrl bindings to json-schema

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Message-ID: <20201001064008.GE3018@kozik-lap>
Date:   Thu, 1 Oct 2020 08:40:08 +0200
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Zhen Lei <thunder.leizhen@...wei.com>
Cc:     Wei Xu <xuwei5@...ilicon.com>, Rob Herring <robh+dt@...nel.org>,
        Jonathan Cameron <Jonathan.Cameron@...wei.com>,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Libin <huawei.libin@...wei.com>,
        Kefeng Wang <wangkefeng.wang@...wei.com>
Subject: Re: [PATCH v6 11/17] dt-bindings: arm: hisilicon: convert
 hisilicon,cpuctrl bindings to json-schema

On Wed, Sep 30, 2020 at 11:17:06AM +0800, Zhen Lei wrote:
> Convert the Hisilicon CPU controller binding to DT schema format using
> json-schema.
> 
> Signed-off-by: Zhen Lei <thunder.leizhen@...wei.com>
> ---
>  .../bindings/arm/hisilicon/controller/cpuctrl.yaml | 29 ++++++++++++++++++++++
>  .../arm/hisilicon/controller/hisilicon,cpuctrl.txt |  8 ------
>  2 files changed, 29 insertions(+), 8 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
>  delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,cpuctrl.txt
> 
> diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
> new file mode 100644
> index 000000000000000..f6a314db3a59416
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
> @@ -0,0 +1,29 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Hisilicon CPU controller
> +
> +maintainers:
> +  - Wei Xu <xuwei5@...ilicon.com>
> +
> +description: |
> +  The clock registers and power registers of secondary cores are defined
> +  in CPU controller, especially in HIX5HD2 SoC.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: hisilicon,cpuctrl
> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg

Your own DTS file (arch/arm/boot/dts/hisi-x5hd2.dtsi) does not validate
against this dtschema.

Best regards,
Krzysztof